UCIe: Marketing Ruins It Again

You may have seen the press release and articles recently about a new standard called UCIe. It stands for Universal Chiplet Interconnect Express. The standard is a great idea and will certainly help the market for chiplet-based designs to advance. But the name — Argggh. More on that later.

First, let’s talk about what it is. You may notice the name looks similar to PCIe (Peripheral Component Interconnect Express), and that is intentional. PCIe probably has been one of the most successful standards in the compute domain, and it literally is the backbone for many systems. Processor vendors (Intel, AMD, Arm), leading-edge foundries (TSMC and Samsung), and hyperscalers (Google and Meta), as well as Microsoft, Qualcomm, and ASE have now formed a consortium, and they are taking that inside the package in an attempt to replicate the success it has had outside the package. In theory, you should be able to buy chiplets for compute cores, peripherals, interconnect, and many other subsystems, and integrate them onto a substrate without worrying about who designed and manufactured each of the chiplets, or who will be doing the packaging. Fantastic.

PCIe has a history of being used as the physical layer for other standards. CCIX (Cache Coherent Interconnect for Accelerators) and CXL (Compute Express Link) are examples. They both enable accelerator chips to attach to server processors while maintaining cache coherence.

This makes perfect sense because PCIe has the right attributes for these types of interconnects, and when put inside the package it will speed everything up. Inside the package there are much smaller distances, smaller resistance, lower inductance and capacitance, hopefully less noise — particularly in the channel. This means the standard can take the concept that has been well proven and make it even better inside the package. According to the press release, “The UCIe 1.0 specification covers the die-to-die I/O physical layer, die-to-die protocols, and software stack which leverage the well-established PCI Express (PCIe) and Compute Express Link (CXL) industry standards.”

It will be much faster, much lower power, and more reliable. I have seen one claim that in should be 20X better, meaning 20X the speed at the same power, or the same speed at 1/20 the power. It was not clear, but the gains should be considerable.

It is also wonderful that this could bring down the costs for chiplet assembly. Today, high costs mean it is a technology reserved only for high-margin devices. When thinking about the server market, the power and area savings alone are enough to justify the added cost. But as the techniques for doing this type of packaging improve, those costs will come down rapidly, and then the chiplet market will become more accessible to everyone.

Now let’s get to the downside. While PCIe is great at integrating peripherals to a processor, it is not a great way to interconnect many things that are likely to become chiplets. HBM (High Bandwidth Memory), another in-package interconnect standard that is already in fairly widespread usage, is used to connect DRAM to processors. Another standard, BOW (Bundle of Wires), is faster, uses less energy, and is more flexible. Of course, you don’t get something for nothing and while these other standards are more flexible, they also require more cooperation between the suppliers of the chiplets and the company assembling them together. There are many considerations in selecting the method to interconnect sub-systems on chiplets into a package, including speed, latency, power, area, number of wires used, and so many more.

But that is the point. There is not, and never will be, a single “Universal” interconnect standard for chiplets. The range of application, and the needs placed on them, are so varied that there will be an array of standards — each targeting specific types of application. The “Universal” in UCIe is totally false. It is being used as a worthless marketing word that will end up confusing and damaging the market. Given the naming of CCIX and CXL, they should have continued in that vein and called it Compute Chiplet Interconnect Express (CCIe).

Why does this happen over and over? Why do marketing folks keep over-reaching and using such hyperbole? I really wish they hadn’t done it, because I think UCIe is a great idea spoiled by a stupid name.