A look at what’s working so far and how well new technologies are progressing.
The throughput and uptime of EUV, and the overlay accuracy of 193nm immersion lithography, continue to steadily improve, though neither is yet ready for 10nm production, according to speakers at SEMICON West.
Mike Lercel, ASML director, Product Marketing, reported several EUV tool sites achieved 70 percent uptime for more than a week, and one customer site had done so for more than four weeks. This year’s overall goal is >50 percent uptime, at 75 wafers per hour throughput, for output that could average ~1,000 wafers per day. Next year, ASML expects more progress in throughput than in uptime, targeting 125 wph but at 55 percent uptime for ~1,500 wpd. Overlay accuracy with the latest model tool is <3nm variability across the wafer. The source is being upgraded from 40W to 80W, and two 100W units are now being tested in ASML plants. EUV resist is turning out to be a prime concern as well, as chemically amplified resist can’t achieve the needed resolution, sensitivity and line edge roughness without trading off one of these qualities for another. “Long term we will need a new resist platform,” argued Greg McIntyre, director, Advanced Patterning, imec, at the Imec Technology Forum, noting good results in the last nine months with resists based on metal nanoparticles or metal oxides that absorb more EUV photons to reduce the shot noise and improve etch selectivity; although of course that means potential problems with cross contamination to solve. Triple patterning (LELELE) with 193 immersion tools would cost about the same as single pass EUV, provided the EUV tool reaches the same uptime availability as the mature immersion process, argued Steve Renwick, director of Computational Imaging, Nikon Research Corp. of America. For making only the higher resolution end cuts and contacts after self-aligned quadruple patterning the lines, even e-beam writing could potentially be cheaper than EUV. Meanwhile, 193 immersion is improving on its own issues of edge placement error. Renwick reported separate work by Nikon, Synopsys and IBM all found ~2-3nm overlay error, or 0.5-3nm total edge placement error (including CD), suggesting that with continued progress multiple printing for 10nm and even 7nm may be feasible, but is not there yet. Imec’s McIntyre also noted that directed self assembly could be a lower cost alternative to self aligned quadruple patterning for basic line patterns, as the technology is improving a rapid rate, but roughness and defectivity still need to be three orders of magnitude better. Meanwhile, nanoimprint technology has reached throughput of 40 wph with ~5nm overlay accuracy, by using four stations with 10 wph, reported Doug Resnick, VP Marketing and Business Development, Canon Nanotechnologies. Next year’s goal is to improve the throughput per station to 15 wph, for 60 wph overall with 6nm overlay, which could make it a low cost contender for some patterns. First target market is NAND flash. Mask life remains significantly below what’s needed though, as the masks are damaged by hard particles after only rather limited use.