It’s not good enough to look at power in a standalone fashion.
With the move to smaller manufacturing nodes, power must be looked at from a holistic perspective.
Instead of just optimizing a device or devising next generation power gating, power must be considered in the context of the whole system, Aveek Sarkar, vice president of product engineering and support at Ansys/Apache mentioned during a recent discussion about 5nm.
In fact, he said, this concept is being borne out in engineering efforts today with the inclusion of on chip power regulators. And while the trend was started by memory chipmakers, it appears to becoming more mainstream.
Sarkar explained that on-chip regulators control how much energy is being supplied to different parts of the circuit without going to the board or going out over to the battery. “Essentially, when you sip power the on-chip regulators are very useful for that.”
Further, as functions become even more integrated, he also expects to see more functions like antennas being build into chips. A number of chips already do this today such as those for communications and analog functions.
And, Sarkar said, even if it’s not going to be put inside the chip, in a design such as a smart phone, IoT device, or a smart watch, if the antenna is not designed properly, it will burn the battery so much faster than whatever is done with the chip because a signal has to be sent from the smartwatch over to the smartphone or something else for the communication to happen. “If the antenna gain is not done properly, or you decide to put — just because it looks fancy — chrome plating on top of the antenna, and if it destroys all of the signal radiation that is coming out, the whole electronic system has to do a lot more work to make sure the signal gets through. That is going to be much more destructive to the whole low power thing than whatever little thing you do for the circuit optimization.”
So it seems that design engineers may also start pondering the best place to put the regulator on the PCB. “Let’s say I’m designing a server rack for a data center. If I were to put the regulator in a non-optimal position, I have to do more work to send the current from the regulator to this high power chip so I ended up losing power as I send it and I’m radiating more energy. But if I determine that for this class of chip I get some appropriate models from the vendor and I decide with simulations that maybe I should put it in a NE position rather than what I felt, which was the SW position, then I don’t have to do that much work to send that power. Those kind of system level approaches are something that have not been considered all along,” he offered.
That said, at the end of the day, does new understanding make tools much more valuable, theoretically?
What it actually means is that people will have to work a little harder, Sarkar said. “And by harder it means that if you just created a little wall around yourself and said, ‘Let me just design the best standard cells in the world and not worry about anything else,’ that’s not going to work anymore because how much heat you generate in your standard cell is going to be determined by what is placed around that standard cell, how the package is designed for that chip – all of those are considered.”
Taking it a step further, maybe this means as a standard cell designer you have to start creating some guidelines for your SoC partners. And if you are an SoC partner you might have to start creating some guidelines your package partner or board designer. “That kind of cross domain collaboration and interaction and knowledge sharing – looking at it more holistically will become more important. Not just, ‘OK I did my job, I can go home now,’ That attitude is going to become less and less valuable,” he concluded.