Debug Becomes A Bigger Problem

The EDA industry has invested enormous amounts of time and energy on the verification process, including new languages, new tools, new class libraries, new methodologies. But the one part of the cycle that defines that type of automation is debug. Development teams are spending half of their time in the debug process and the problem is growing. Part of the reason is that design and debug are... » read more

Micro-Architectural Exploration for Low Power Design

In the first part of this series, we had discussed the need to perform power optimizations and exploration at higher levels of abstractions where the potential to reduce the power consumption is highest. We presented the need for making coarser changes at higher level of abstractions to exploit full power saving potential. In the second part, we discussed some very potent micro-architectural te... » read more

How To Model Cars

The most technologically advanced and comprehensive consumer product in the world today is not the smartphone. It's the automobile. This is easier to see once the hood is up and you can take a peek around. Today’s cars contain sophisticated motion systems, crash safety systems, climate control systems, driver assistance, and infotainment, to name a few. In semiconductor design, one of the ... » read more

ROI Not There Yet For SysML

At some point down the road in the realm of system-level design, the Systems Modeling Language (SysML) dialect of the Unified Modeling Language (UML) standard may drive into semiconductor design. So far, however, a return on investment has not been established for its use. SysML is defined as a general-purpose visual modeling language for systems engineering applications, and it supports the... » read more

The Next Level Of Abstraction For System Design

Recently there have been a lot of discussions again about the next level of design abstraction for chip design. Are we there yet? Will we ever get there? Is it SystemC? UML/SysML perhaps? I am taking the approach of simply claiming victory: Over the last 20 years we have moved up beyond RTL in various areas—just in a fragmented way. However, the human limitations on our capacity for processin... » read more

What ESL Is Really About

There has been an almost constant disagreement between the generally held view about what ESL is and my own views on the subject. It is not completely surprising, given that I have spent most of my time as a verification specialist working within the EDA industry. EDA has been driven by design, and all of the largest EDA companies grew out of advances on the design side. [getkc id="10" kc_na... » read more

What Is ‘Digital’?

I saw a LinkedIn article with this title a couple of weeks ago and was curious. Do we not know what digital is and do we need to question it? When I read the first line I was very surprised and somewhat confused. Ved Sen, the author said that, “Despite working in the digital space for years, now I was quite stumped a few weeks ago when I was asked to define it.” Why would digital be so d... » read more

Why Implementation Matters To System Design And Software

There has been quite some discussion in the recent past how well abstraction really works in enabling system design and verification. As I admitted in “Confessions of an ESL-Aholic” a while back, I have revised my view significantly over the years. While thinking originally of abstraction more as an panacea, it turns out that important decisions and analyses, such as for power and performan... » read more

How Many Levels Of Abstraction Are Needed?

Recently I was having a conversation with a user who was creating cycle accurate SystemC models. My initial thought was, "Why would this be necessary?" Through the course of discussions I realized that he did have a design questions that required that level of accuracy and the simulation performance trade-offs were appropriate for his needs. His cycle accurate SystemC models were running at abo... » read more

Big Shift In SoC Verification

Semiconductor Engineering sat down to discuss software-driven verification with Ken Knowlson, principal engineer at Intel; Mark Olen, product manager for the Design Verification Technology Division of Mentor Graphics; Steve Chappell, senior manager for CAE technology and verification at Synopsys; Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadenc... » read more

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