The Week In Review: Design


IP ARM launched the Mali-C71 image signal processor (ISP), targeting ADAS SoCs. The ISP is capable of processing up to 4 real-time cameras and 16 camera streams with a single pipeline and provides advanced error detection with more than 300 dedicated fault detection circuits. Included is full reference software to control the ISP, sensor, auto white balance and auto exposure. Synopsys ext... » read more

Balancing Emulation And FPGA-Based Prototyping For Software Development


This year’s Design Automation Conference (DAC) has just finished and confirmed some of the trends I discussed in my last blog, “The Top Five Trends in Verification to Watch For at DAC 2016”, specifically when it comes to the set of connected engines, or “COVE” as Jim Hogan dubbed it. The Cadence Theater at DAC is always a good opportunity to listen to hands-on customer experiences, an... » read more

The Week In Review: System-Level Design


Synopsys rolled out new non-volatile memory IP that cuts power by 90% and reduces area in half. The company said it accomplished this feat with a single-bit read capability, which can drop read operation down to 0.9 volts and peak current to less than 10 microamps during erase and programming. The target of the ultra-low power IP is RFID and near-field computing ICs. Mentor Graphics posted p... » read more