tag: machine learning

ML-Assisted IC Test Binning With Real-Time Prediction At The Edge
By PDF Solutions - 07 Feb, 2024 - Comments: 0

IC Test is a critical part of semiconductor manufacturing and proper die binning and material disposition has an important impact on the overall yield and on the process monitoring and failure mode diagnostics. Edge analytics are becoming an increasingly important aspect of die disposition. By intercepting parts in real-time at the wafer test step, we can save downstream processing needs. In th... » read more

Preparing For An AI-Driven Future In Chips
By Ed Sperling - 01 Feb, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the impact of AI on semiconductor architectures, tools, and security, with Michael Kurniawan, business strategy manager at Accenture; Kaushal Vora, senior director and head of business acceleration and ecosystem at Renesas Electronics; Paul Karazuba, vice president of marketing at Expedera; and Chowdary Yanamadala, technology s... » read more

Machine Learning Based MBIST Area Estimation
By Cadence - 03 Jan, 2024 - Comments: 0

Majority of the silicon with-in a design is occupied by memories. Memories are more prone to failures than logic due to their density. Several techniques have been established to target and detect defects within these memory instances and their interfacing logic. The most widely used approach is memory built-in self-test (MBIST) that inserts on-chip hardware unit(s) which provides systematic me... » read more

Increasing AI Energy Efficiency With Compute In Memory
By Katherine Derbyshire - 16 Nov, 2023 - Comments: 0

Skyrocketing AI compute workloads and fixed power budgets are forcing chip and system architects to take a much harder look at compute in memory (CIM), which until recently was considered little more than a science project. CIM solves two problems. First, it takes more energy to move data back and forth between memory and processor than to actually process it. And second, there is so much da... » read more

Applications Of Large Language Models For Industrial Chip Design (NVIDIA)
By Technical Paper Link - 10 Nov, 2023 - Comments: 0

A technical paper titled “ChipNeMo: Domain-Adapted LLMs for Chip Design” was published by researchers at NVIDIA. Abstract: "ChipNeMo aims to explore the applications of large language models (LLMs) for industrial chip design. Instead of directly deploying off-the-shelf commercial or open-source LLMs, we instead adopt the following domain adaptation techniques: custom tokenizers, domain-ad... » read more

Neural Network Model Quantization On Mobile
By Roberto Lopez Mendez - 09 Nov, 2023 - Comments: 0

The general definition of quantization states that it is the process of mapping continuous infinite values to a smaller set of discrete finite values. In this blog, we will talk about quantization in the context of neural network (NN) models, as the process of reducing the precision of the weights, biases, and activations. Moving from floating-point representations to low-precision fixed intege... » read more

New Insights Into IC Process Defectivity
By Laura Peters - 07 Nov, 2023 - Comments: 1

Finding critical defects in manufacturing is becoming more difficult due to tighter design margins, new processes, and shorter process windows. Process marginality and parametric outliers used to be problematic at each new node, but now they are persistent problems at several nodes and in advanced packaging, where there may be a mix of different technologies. In addition, there are more proc... » read more

Optimization Of The Interface Between The PD And The AFE In High-Speed, High-Density Optical Receivers
By Technical Paper Link - 27 Oct, 2023 - Comments: 0

A technical paper titled “Optimizing the Photodetector/Analog Front-End Interface in Optical Communication Receivers” was published by researchers at University of Toronto. Abstract: "This article addresses the optimization of the interface between the photodetector (PD) and the analog front-end in high-speed, high-density optical communication receivers. Specifically, the article focuses... » read more

Energy Usage in Layers Of Computing (SLAC)
By Technical Paper Link - 19 Oct, 2023 - Comments: 0

A technical paper titled “Energy Estimates Across Layers of Computing: From Devices to Large-Scale Applications in Machine Learning for Natural Language Processing, Scientific Computing, and Cryptocurrency Mining” was published by researchers at SLAC National Laboratory and Stanford University. Abstract: "Estimates of energy usage in layers of computing from devices to algorithms have bee... » read more

Applying Machine Learning to EDA, FPGA Design Automation Tools
By Technical Paper Link - 11 Oct, 2023 - Comments: 0

A technical paper titled “Application of Machine Learning in FPGA EDA Tool Development” was published by researchers at the University of Texas Dallas. Abstract: "With the recent advances in hardware technologies like advanced CPUs and GPUs and the large availability of open-source libraries, machine learning has penetrated various domains, including Electronics Design Automation (EDA). E... » read more

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