Materials For Future Electronics


Examining the research underway in electronics materials provides a keyhole view into what may be possible in future electronics design. Although some of this research will not end up in commercial products, it does provide an indication of the kinds of problems that are being addressed, how they are being approached, and where the research dollars are being spent. Flexible electronics are a... » read more

Rush Hour On The Technology Roadmap


Starting this week, the International Solid State Circuits Conference (ISSCC) will commence at the Marriott in downtown San Francisco. This prestigious conference showcases the latest semiconductor innovations from around the world. Looking at the advance program, one can’t help but notice a shift in the work presented. The conference theme this year is: “Intelligent Chips for a Smart World... » read more

Changing Direction In Chip Design


Andrzej Strojwas, chief technologist at PDF Solutions and professor of electrical and computer engineering at Carnegie Mellon University—and the winner of this year's Phil Kaufman Award for distinguished contributions to EDA—sat down with Semiconductor Engineering to talk about device scaling, why the semiconductor industry will begin to fragment around new architectures and packaging, and ... » read more

What’s Next For Transistors


The IC industry is moving in several different directions at once. The largest chipmakers continue to march down process nodes with chip scaling, while others are moving towards various advanced packaging schemes. On top of that, post-CMOS devices, neuromorphic chips and quantum computing are all in the works. Semiconductor Engineering sat down to discuss these technologies with Marie Semeri... » read more

Changing Economics In Chip Manufacturing


The foundry and equipment businesses are poised for significant changes that could affect the balance of power far beyond just the semiconductor manufacturing sector. It’s no secret that the number of companies developing new chips at 7nm is shrinking. There will be even fewer at 5nm. The business case for moving forward is that density must provide a competitive edge. But that density imp... » read more

Inside Neuromorphic Computing


Semiconductor Engineering sat down to talk about neuromorphic technology with Guy Paillet, chief executive of General Vision. The fabless IC design house is a pioneer and supplier of neuromorphic chips. What follows are excerpts of that conversation. SE: In 1993, you invented and co-patented a neural networking chip with IBM. Then, you joined General Vision in 1999. Briefly tell us about Gen... » read more

Neuromorphic Chip Biz Heats Up


It’s no secret that today’s computers are struggling to keep up with the enormous demands of data processing and bandwidth, and the whole electronics industry is searching for new ways to enable that. The traditional approach is to continue to push the limits of today’s systems and chips. Another way is to go down the non-traditional route, including an old idea that is generating stea... » read more

Why Use A Package?


Subramanian Iyer, distinguished chancellor's professor in UCLA's Electrical Engineering Department—and a former fellow and director of the systems scaling technology department at IBM—sat down with Semiconductor Engineering to talk about the future of chip scaling. What follows are excerpts of that conversation. SE: Advanced packaging is being viewed as a way to extend scaling in the fut... » read more

Brain-Inspired Computing


Approaching power/performance tradeoffs from an architectural perspective is essential given the complexities of today’s SoCs. And beyond some traditional techniques that I discussed in a recent article, Bernard Murphy, CTO at Atrenta mentioned that there is currently a lot of buzz about using non-Von Neumann architectures — especially for recognition functions (voice, image and text). ... » read more

Darker Silicon


For the last several decades, integrated circuit manufacturers have focused their efforts on [getkc id="74" comment="Moore's Law"], increasing transistor density at constant cost. For much of that time, Dennard’s Law also held: As the dimensions of a device go down, so does power consumption. Smaller transistors ran faster, used less power, and cost less. As most readers already know, howe... » read more