Chip Industry Week In Review


By Adam Kovac, Karen Heyman, and Liz Allan.  China introduced strict procurement guidelines aimed at blocking the use of AMD and Intel processors in government computers. Meanwhile, China urged the Netherlands to ease restrictions on deep ultraviolet (DUV) litho equipment, according to Nikkei Asia. DUV is an older technology, based on 193nm ArF lasers, but in conjunction with multi-p... » read more

DAC/SEMICON West 2023 Roundup


The interdependence of semiconductor devices and companies in manufacturing was a recurring theme at this year's SEMICON West, both in presentations and one-on-one discussions. Challenges range from sharing data securely across a highly integrated supply chain, particularly in light of heterogeneous integration, security concerns, and the increased use of AI, as well as concerns about the robus... » read more

Breaking The 1M RAID5 Write IOPS Barrier


In today’s data-centric age, enormous amounts of data are generated, stored and processed at an unprecedented rate. Businesses are utilizing this data to make better decisions, drive greater efficiencies, develop more desirable products, improve profitability and ultimately increase user satisfaction. To continue deriving a high degree of value from a rapidly-expanding data flow, today’s en... » read more

Week In Review: Semiconductor Manufacturing, Test


The U.S. Commerce Department outlined proposed rules for the Chips for America Incentives Program, including additional details on national security measures applicable to the CHIPS Incentives Program included in the CHIPS and Science Act. The rules limit funding recipients from investing in the expansion of semiconductor manufacturing in foreign countries of concern, notably the People’s Rep... » read more

Week In Review: Design, Low Power


Synopsys rolled out an AI-driven design suite called Synopsys.ai at the Synopsys User Group conference this week, which it says reduces time to better results at multiple points in the design flow. The company noted the new technology uses reinforcement learning, which compensates for relatively small data sets by allowing engineers to interact with that data more easily at any point, and to ch... » read more

Improving Performance And Power With HBM3


HBM3 swings open the door to significantly faster data movement between memory and processors, reducing the power it takes to send and receive signals and boosting the performance of systems where high data throughput is required. But using this memory is expensive and complicated, and that likely will continue to be the case in the short term. High Bandwidth Memory 3 (HBM3) is the most rece... » read more

DeepGBASS: Deep Guided Boundary-Aware Semantic Segmentation


Image semantic segmentation is ubiquitously used in scene understanding applications, such as AI Camera, which require high accuracy and efficiency. Deep learning has significantly advanced the state-of-the-art in semantic segmentation. However, many of recent semantic segmentation works only consider class accuracy and ignore the accuracies at the boundaries between semantic classes. To improv... » read more

Migrating 3D Into The Mainstream


Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for ANSYS' Semiconductor Business Unit; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Business;... » read more

FD-SOI Vs. FinFETs


Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

FD-SOI Vs. FinFETs


Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

← Older posts