Architecting For Efficiency


By definition, to be efficient is to perform or function in the best possible manner with the least waste of time and effort; having and using requisite knowledge, skill, and industry. As this relates to SoC design today, achieving the highest level of efficiency is a challenge with many dimensions. Efficiency comes in multiple ways. “One dimension would be power consumption,” said Oz Le... » read more

Approaching IP Quality From Many Angles


As SoC design complexity has increased, semiconductor design IP and the industry around it has grown in its level of sophistication. This is great news for the users of that IP whose demands for quality, reliability and other deliverables have also been on the rise. Making sure users have what they need requires close collaboration between the semiconductor foundries, IP providers and of cou... » read more

Experts At The Table: How To Improve IP Quality


By Ann Steffora Mutschler Semiconductor Engineering sat down to discuss the best ways to improve the quality of design IP with Piyush Sancheti, vice president of product marketing at Atrenta; Chris Rowen, Cadence Fellow and former CTO at Tensilica; Gene Matter, senior applications manager at Docea Power; Warren Savage, president and CEO of IPextreme; and Dan Kochpatcharin, deputy director of ... » read more

Design For Configurability


I admit it was a bit of a surprise to me to hear from a leading IP provider of the missteps that still befall design teams today as they seek to reuse IP, but it’s a little like rubbernecking. How do you not look? According to Grant Martin, chief scientist at Tensilica, “The biggest thing that people still don’t think about at the beginning of designing some new function is designing i... » read more