Hybrid emulation; TSMC 16FF+ quoting; Synopsys place and route grows; ARM’s latest IP; automotive software platform & Ethernet PHY; funding for FPGA-on-SoC startup; financial reports from Cadence & NXP; MIPI Gigabit Debug.
Aldec introduced Hybrid Emulation including support for ARM Fast Models. Aldec says the capability to link an SoC emulation hardware platform with a virtual platform allows both software and hardware teams to work on the most up-to-date version of the project, long before first silicon is available, or even much of the RTL or IP has been completed.
eSilicon’s online quoting tools for multi-project wafer prototyping runs and full-production GDSII tapeout now support TSMC’s 16nm FinFET Plus technology.
According to Synopsys, its IC Compiler II place and route system has been successfully deployed on more than 100 production designs in the first year since introduction in 2014, including more than 50 unique customers across 18 different foundry process nodes.
ARM presented a pair of new system IP targeted at next-generation premium mobile devices. The CoreLink CCI-550 interconnect enables ARM big.LITTLE processing and a fully coherent GPU while lowering latency and increasing peak throughput. The CoreLink DMC-500 memory controller provides higher bandwidth and latency response for processors and display.
IoT & Automotive
Mentor Graphics released a new, automotive-focused software platform providing scalable frameworks for IVI, Driver Information and ADAS applications. The software stack delivers technologies including Fastboot, Instant-On, and optimized audio/video functionality. Mentor also updated the Nucleus RTOS, adding ARM TrustZone support for secure processor partitions. This release also includes support for low power, resource constrained IoT devices with 6LoWPAN and 802.15.4 wireless connectivity.
OmniPhy announced new automotive Ethernet PHY IP, which it says has been silicon-proven on an advanced process technology node. The design implements the automotive Ethernet 100Base-T1 standard and emphasizes power saving and reliability diagnostic modes.
The MIPI Alliance introduced a new family of specifications, MIPI Gigabit Debug. The specifications enable companies to debug and optimize mobile systems throughout the lifecycle of a product’s development. The specifications also facilitate robust debugging of form factor devices and remote debugging of products that are part of the IoT.
New startup Flex Logix secured $7.4 million in equity financing. The company, which licenses EFLX Arrays enabling FPGAs to be embedded into any SoC, was founded in 2014 by Geoff Tate (a Rambus founder), Fang-Li Yuan, and Cheng Wang. The financing round was led by dedicated hardware fund Eclipse Ventures and included participation from founding investors Lux Capital and the Tate Family Trust.
Cadence reported third quarter 2015 financials with revenue of $434 million, up 8% year-over-year. Net income, on a GAAP basis, was $78 million. (Non-GAAP was $89 million.) For 2015, the company expects total revenue in the range of $1.695 billion to $1.705 billion.
NXP also released its Q3 results showing total revenue of $1.52 billion. “Revenue was approximately flat versus the same period in the prior year, and increased about one percent from the prior quarter, but below the lower end of our guidance. In spite of slightly weaker revenue trends, non-GAAP diluted earnings per share were $1.57, above the high-end of guidance,” said NXP CEO Richard Clemmer.
Synopsys followed up recent security acquisitions by pulling on board Howard A. Schmidt, former cyber advisor to Presidents Barack Obama and George W. Bush, as Synopsys’ security advisor. In this newly established position, he will advise Dr. Chi-Foon Chan, Synopsys president and co-CEO, and the company’s software integrity group on a broad range of security-related matters.
NXP’s NFC security solutions will be included in a World Customs Organization anti-counterfeiting program allowing customs officials to instantly verify the authenticity of a product. NXP also struck deals with MasterCard to broaden the number of devices offering mobile payment options and with Sequent to promote mobile devices as access cards.
Brite Semiconductor inked a deal for an architectural license to Uniquify’s DDR technology, which will form the foundation of Brite’s DDR solutions targeting SMIC’s 40nm and 28nm processes. The license covers access to the DDR controller, PHY and I/O technologies as well as debug and testbench software.
Imagination’s MIPS CPU architecture is one of the key CPU architectures supported by Google’s new IoT-focused Brillo OS. A soon-to-be-released development board from Imagination has also been selected as a starter platform for Brillo developers.