January 2017 - Page 5 of 11 - Semiconductor Engineering

What’s Up MEMS?
By Mike Rosa - 19 Jan, 2017 - Comments: 0

Strong segment growth. A whole slew of new devices on the horizon. A healthy pipeline of enabling critical problems to be solved. Has somebody been peeking at my Christmas list? Possibly yes, and thankfully so, because 2016 has been that kind of year in MEMS. Taking a look at the numbers from Yole Developpement, they expect 2016 MEMS device segment revenue to be around $13B, with an estimate... » read more

China Factors Heavily In Policy And Business Considerations
By Deborah Geiger - 19 Jan, 2017 - Comments: 0

The year begins with intensified attention to China’s rapid semiconductor industry growth, which was a central theme of the recent SEMI Industry Strategy Symposium (ISS) and also weighed heavily in a new report from a Presidential advisory council. Speaking at the SEMI Industry Strategy Symposium (ISS), Handel Jones, CEO of International Business Strategies (IBS), forecast the global sem... » read more

Inside Photomask Writing
By Mark LaPedus - 19 Jan, 2017 - Comments: 0

Hirokazu Yamada, a board member and the director of the Mask Lithography Division of NuFlare, sat down with Semiconductor Engineering to discuss photomask technology, e-beam mask writer trends and other topics. NuFlare is the world’s largest supplier of e-beam mask writers. What follows are excerpts of that conversation. SE: How does the [getkc id="265" kc_name="photomask"] market look in... » read more

China Unveils Memory Plans
By Mark LaPedus - 19 Jan, 2017 - Comments: 2

Backed by billions of dollars in government funding, China in 2014 launched a major initiative to advance its domestic semiconductor, IC-packaging and other electronic sectors. So far, though, the results are mixed. China is making progress in IC-packaging, but the nation’s efforts to advance its domestic logic and memory sectors are still a work in progress. In fact, China has yet to achi... » read more

Our New Space For Innovation And Collaboration
By Jamie Smith - 19 Jan, 2017 - Comments: 0

Today is an exciting day at our Austin headquarters: this morning we officially opened our Industrial IoT (Internet of Things) Lab! You can watch the ribbon cutting ceremony on our Facebook page. Our Industrial IoT Lab is a hub of intelligent systems that bridge operational technology (OT) with information technology (IT) and the companies working on them. We’ve purposefully design... » read more

Accuracy In Optical Overlay Metrology
By KLA - 18 Jan, 2017 - Comments: 0

By Barak Bringoltz, Tal Marciano, Tal Yaziv, Yaron DeLeeuw, Dana Klein, Yoel Feler, Ido Adam, Evgeni Gurevich, Noga Sella, Ze’ev Lindenfeld, Tom Leviant, Lilach Saltoun, Eltsafon Ashwal, Dror Alumot and Yuval Lamhot, Xindong Gao, James Manka, Bryan Chen, and Mark Wagner. Abstract In this paper we discuss the mechanism by which process variations determine the overlay accuracy of optical m... » read more

Standardizing Platforms From Characterization To Production
By NI - 18 Jan, 2017 - Comments: 0

In 1983, the first commercial mobile phone retailed for $3995, almost $10,000 in today’s economy. It supported a single band, weighed almost a kilogram, and was about the size of a brick. Two decades later, a quad-band “world phone” costs a few hundred dollars. Even a basic mobile phone that supports over 20 cellular bands, in addition to Bluetooth, Wireless LAN, and GPS technology, ... » read more

FinFET And Multi-Patterning Aware Place-And-Route Implementation
By Mentor, a Siemens Business - 18 Jan, 2017 - Comments: 0

The use of finFETs and multi-patterning has a huge impact on the entire physical implementation flow. This paper outlines the new challenges in placement, routing, optimization, and physical verification and describes how the Nitro-SoC place and route system handles them. To read more, click here. » read more

Blog Review: Jan. 18
By Jesse Allen - 18 Jan, 2017 - Comments: 0

Mentor's Michael White warns that while skipping a node can be appealing, be prepared for the increase in computation requirements. Synopsys' Hezi Saar checks out the benefits of moving to the MIPI I3C standardized sensor interface. Cadence's Paul McLellan highlights a talk by Eric Grosse on approaches to security and the RISC-V architecture. Applied's Mike Chudzik explains the problem... » read more

Performance Increasingly Tied To I/O
By Ed Sperling - 18 Jan, 2017 - Comments: 0

Speeding up input and output is becoming a cornerstone for improving performance and lowering power in SoCs and ASICs, particularly as scaling processors and adding more cores produce diminishing returns. While processors of all types continue to improve, the rate of improvement is slowing at each new node. Obtaining the expected 30% to 50% boost in performance and lower power no longer can ... » read more

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