A new technical paper titled “Omni 3D: BEOL-Compatible 3-D Logic With Omnipresent Power, Signal, and Clock” was published by researchers at Stanford University, Intel Corporation and Carnegie Mellon University.
Abstract
“This article presents Omni 3D—a 3-D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D interleaves metal layers with 3-D-stacked nFETs and pFETs. Thus, the signal and power routing layers have fine-grained, all-sided access to the field-effect transistor (FET) active regions maximizing 3-D standard cell design flexibility. This is in sharp contrast to approaches such as back-side power delivery network (BSPDN), complementary FETs (CFETs), and stacked FETs. Importantly, the routing flexibility of Omni 3D is enabled by double-side metal and interleaved metal (IM) for inter-and intracell routing, respectively. In this work, we explore Omni 3D variants (e.g., both with and without the IM) and optimize these variants using a virtual-source BEOL-FET compact model. We establish a physical design flow that efficiently uses the double-side routing in Omni 3D and perform a thorough design technology co-optimization (DTCO) of Omni 3D device architecture on several design points. From our design flow, we project 2.0× improvement in the energy–delay product (EDP) and 1.5× reduction in area on average across our benchmark circuits compared with the state-of-the-art CFETs with BSPDN.”
Find the technical paper here. February 2025.
S. Choi, C. Gilardi, P. Gutwin, R. M. Radway, T. Srimani and S. Mitra, “Omni 3D: BEOL-Compatible 3-D Logic With Omnipresent Power, Signal, and Clock,” in IEEE Transactions on Electron Devices, doi: 10.1109/TED.2025.3537955.
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