5 Takeaways From BACUS

As usual, the recent SPIE Photomask Technology Conference, sometimes called BACUS, was a busy event.

The event, which took place in San Jose, Calif., featured presentations on the usual subjects in the photomask sector. There were presentations on mask writers, inspection, metrology, repair and cleaning. And, of course, the papers included masks based on extreme ultraviolet (EUV) lithography and optical.

In no particular order, here are my five takeaways from the event:

Older nodes are still robust (and getting real)
The photomask industry reflects what’s happening in the IC market. Today, chipmakers are ramping up 16nn/14nm finFET processes, with 10nm and 7nm in the works.

While mask makers are ramping up leading-edge photomasks, the nodes are clearly slowing and extending beyond the traditional two-year cadence. Fewer and fewer chipmakers are at the leading edge. Many can’t afford the soaring IC design and manufacturing costs.

Surprisingly, though, demand for 200mm fab capacity and associated tools remains relatively robust. Trailing-edge nodes, such as 28nm and above, also remain strong.

“(There are) a lot of new segments that ICs are getting into with much lower ASPs,” said Christopher Progler, chief technology officer and vice president of strategic planning at Photronics, during a keynote address at SPIE Photomask. “The Internet of Things and all of these applications are not driving the kind of ASP chips that can fund the type of R&D we do.”

The industry must also come to grips with other sobering trends. “Industry growth rate is slowing. It’s undeniable and return in investment in new technologies is no longer really assured. It’s led to unprecedented M&A activity in our business and fewer current devices actually benefit from scaling in lithography,” Progler said.

On the positive side, there are a lot of new applications emerging, such as artificial intelligence, encryption, extreme processing and others, he said. “All of those things are driving the need for a lot more capabilities in ICs,” he added.

Meanwhile, in the photomask industry, a large percentage of mask shipments are still at the trailing edge. That’s not surprising and has always been the case over the years. What’s surprising is that the trailing edge remains so robust.

According to the recent Mask Maker Survey, the biggest market for photomasks in terms of shipments were between 90nm to less than 130nm. In total, some 39.3% of the world’s masks were shipped between these nodes, according to the survey, which was compiled by the eBeam Initiative.

In total, some 31.1% of the world’s masks were shipped at 130nm and above, according to the survey. This figure represents the percentage of 212,965 masks delivered by nine companies from the third quarter of 2015 to the second quarter of 2016.

The leading-edge represents a small fraction of the total. Total shipments for masks from 16nm to less than 22nm is 4.6%, 11nm to less than 16nm is 1.4%, and 7nm to less than 11nm is 0.7%, according to the survey.

China or bust
The annual mask conference takes place in California. Yet, a large percentage of the action in the mask industry is now taking place in one location–China.

Intel is ramping up a new mask shop in Oregon, according to sources, but two merchant mask makers are expanding or setting up production plants in China. And mask equipment makers are aggressively pursuing new and welcomed business in China.

Toppan Photomasks, for example, has been in China since in 1997. Its current factory, based in Shanghai, is capable of making 0.25-micron masks. Toppan has built a new plant next to that and recently started ramping up masks. The plant makes 90nm masks that can be extended to 65nm.

Then, in August, Photronics announced plans to invest in China. Photronics signed an investment agreement with The Administrative Committee of Xiamen Torch Hi-Tech Industrial Development Zone (Xiamen Torch), a national-level hi-tech zone in China, to establish a manufacturing facility in Xiamen, China.

Photronics will build and operate a facility to engage in R&D, manufacture and sale of photomasks. Over the next five years, Photronics plans to invest $160 million under the agreement. Construction is planned to begin in 2017 and production should start in late 2018.

Look for more news from China this year and beyond.

Still wanted: actinic inspection
In 2009, Intel wanted the industry to develop inspection equipment for EUV masks. At the time, the chip giant wanted mask blank and patterned inspection for EUV masks.

At the recent photomask conference, Intel was still begging for inspection tools for EUV masks. Lasertec has done its part. The company is readying an actinic mask blank tool for EUV masks.

But much to the chagrin of Intel and others, there is still no actinic-based patterned mask inspection tool for EUV. Using the same 13.5nm wavelength as EUV, actinic inspection can supposedly find more defects than optical for EUV masks.

KLA-Tencor started to develop an actinic tool some years ago, but it threw in the towel when it could not get funding. Today, it would take several years and $500 million or more in funding to develop a production tool.

So how can the industry develop such a technology? Here’s some possible ideas: 1) a tool vendor develops a tool from scratch; 2) the industry forms a consortium to develop one; 3) chipmakers give up the idea and use today’s inspection techniques.

The first scenario is problematic. If a tool vendor developed an actinic tool for patterned inspection on its own, it would take an enormous amount of resources with a questionable payback. There are only a handful of mask customers that would require such a tool. In total, a vendor would likely sell only “four to five systems,” said G. Dan Hutcheson, chairman and chief executive of VLSI Research.

To get a return, a tool vendor must charge a fortune for the system. “The price of a tool would be from $500 million to $1 billion,” he said. No one is willing to pay up to $1 billion for an inspection system.

The second option is to form a consortium. So far, though, there is little or no movement on that front. But the industry, according to sources, is exploring the idea of extending Lasertec’s actinic technology to pattern mask inspection. It’s unclear if or when that will happen.

For now, the current solution is to inspect EUV masks with e-beam and optical tools. The industry will need to make do with those technologies unless it forks over billions of dollars for an actinic inspection technology that might not fly.

What happen to NGL?
Still, EUV remains the leading contender in the next-generation lithography (NGL) race. In fact, it’s becoming obvious that EUV is one of the few, if only, NGL technologies left standing. The NGL candidates include EUV, directed self-assembly (DSA), multi-beam e-beam and nanoimprint.

One presenter at SPIE Photomask declared that DSA is too late for memory and not ready for logic. Defects, according to the presenter, are the main problems with DSA.

Direct-write lithography is still used for niche applications like ASICs, photonics and others. Multi-beam e-beam is still an option for leading-edge logic. Multi-beam technology is still out there, but it’s not getting nearly enough attention. Instead, the industry continues to throw more money and resources at EUV.

Meanwhile, nanoimprint also remains a viable option, at least for memory. At present, nanoimprint is mainly targeted for NAND, not logic.

Of course, let’s not forgot optical. Amazingly, immersion continues to move forward and remains the workhorse in the fab.

But will EUV miss the 7nm window?
During the week of BACUS, GlobalFoundries held a separate event. The company announced its 7nm finFET technology.

It also disclosed its lithography strategy at 7nm. Basically, GlobalFoundries and TSMC are taking the same path. TSMC is developing EUV at 7nm, but it will use 193nm immersion and multi-patterning at that node. EUV will not be ready in time for TSMC’s 7nm node, which is slated for 2018. TSMC hopes to insert EUV for mass production at 5nm. It hopes to ramp up 5nm by 2020.

In contrast, Intel and Samsung still have EUV on their respective roadmaps at 7nm. EUV, according to the two companies, will simplify the patterning flow at 7nm.

But if EUV is not ready for 7nm, Intel won’t wait for it. Instead, Intel will go down the immersion/multi-patterning route at 7nm. If that occurs, Samsung will likely follow the same path.

Time will tell if those scenarios take place. For its part, ASML is working hard to bring up EUV for 7nm and the company has made remarkable progress in the last year.

At 5nm, meanwhile, EUV is clearly the leading candidate. But to be sure, though, the industry is trying to figure out how to implement 193nm immersion and multi-patterning at 5nm. On paper, multi-patterning looks painful at 5nm. Of course, so does EUV.

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