Alternative Text

Ann Mutschler

  (all posts)
Ann Mutschler is senior executive editor at Semiconductor Engineering.

Author's Latest Posts

Bridging The Gap
By Ann Mutschler - 01 Dec, 2011 - Comments: 0

We talk all the time about hardware/software co-design, co-verification, etc., but what is really interesting now is how vital the connection is between power awareness and system-level design. Yes, it sounds obvious, but so far this is an untapped market with ideas still being batted around. As discussed in Parts 1, 2 and 3 of my article series on energy and power, to achieve the best power... » read more

Managing IP In Complex Devices
By Ann Mutschler - 17 Nov, 2011 - Comments: 0

By Ann Steffora Mutschler Whether it is a smartphone, tablet, video game with home networking feature or any other digital device, each contains multiple subsystems with a mixture of IP blocks from either in-house development or licensed from third parties. Managing the subsystems, let alone the individual IP blocks and the interplay between all of them, is not getting any easier. In fact, wit... » read more

More EMI Mitigation
By Ann Mutschler - 03 Nov, 2011 - Comments: 0

With electromagnetic interference a major design challenge today in any product that sends or receives a signal, determining how to lessen the impact of this phenomenon was addressed to a large extent in my article, “EMI Cuts a Wide Swath,” but there are a few additional techniques that are important to highlight. Erick Olsen, marketing director at NXP explained that higher performance c... » read more

Are We There Yet?
By Ann Mutschler - 06 Oct, 2011 - Comments: 0

We’ve been talking in the industry for as long as I can remember about hardware and software co-design and I’m always curious to hear how that it progressing….or not. I posed this question to Jon McDonald, technical marketing engineer in Mentor Graphics’ design creation synthesis group who is constantly in touch with engineering teams. His take is that hardware and software teams are... » read more

Solid Verification Methodology Essential To Productivity
By Ann Mutschler - 22 Sep, 2011 - Comments: 0

Verifying SoCs from a functional perspective pushes the limits of already lean resources, driving verification teams to seek out new ways to improve productivity of verification tasks. Of course, with the verification task being a time-bound one, the challenge is daunting. It is well understood that consumer electronics is pushing the technology envelope in terms of the amount of technology ... » read more

Describing Power Intent
By Ann Mutschler - 08 Sep, 2011 - Comments: 0

Please don’t flame me. I am not aiming this at any one group in particular, but I am always struck at the slowness at which standards efforts move, especially when design teams are the ones really feeling the pain. Case in point: Savita Banerjee, SoC test and verification manager at LSI, told me recently that one of the most important challenges to be solved is a standard way to describe p... » read more

Getting The Balance Right
By Ann Mutschler - 11 Aug, 2011 - Comments: 0

Defining the power architecture for a low-power design means striking a balance between the high-level abstraction and measurements made typically at RTL and below, but today that is easier said than done. “The balance is that at the high level of abstraction, the design choices you make have a big effect over power, yet your ability to measure them is incomplete until you get much further... » read more

Don’t Forget Test
By Ann Mutschler - 11 Aug, 2011 - Comments: 0

In the modeling of designs for power, engineers make sure to include real system modes and get real activity vectors but, according to Pete Hardee at Cadence, there are a few things they are forgetting. “If the only activity you are using is your simulation test vectors, those are probably pretty unrealistic and that’s a big source of error. One other thing we see—and this is quite imp... » read more

Solving Memory Subsystem Bottlenecks In 3D Stacks
By Ann Mutschler - 28 Jul, 2011 - Comments: 0

In today’s do-or-die market environment, many SOC makers strive to differentiate their product based upon the rate at which it performs processing. Closely coupled are power concerns that have led to dominance of a multi-core approach, while economic considerations have resulted in the dominance of the Unified Memory Architecture, where all the processors share access to external DRAM. Stacki... » read more

Aren’t We Beyond That?
By Ann Mutschler - 21 Jul, 2011 - Comments: 0

The latest and greatest technologies always get the most attention because they are new and fresh, but gate-level simulation—a long-time workhorse tool—is seeing a small comeback with designers as of late. According to Cadence’s Pete Hardee, even though the industry is spending a lot of time looking ahead to architectural-level power modeling and virtual prototyping, the need for detai... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy