Alternative Text

Ann Mutschler

  (all posts)
Ann Mutschler is senior executive editor at Semiconductor Engineering.

Author's Latest Posts

It’s All About Power
By Ann Mutschler - 08 Apr, 2010 - Comments: 0

In my last entry regarding IBM’s claim for new x86 technology for the datacenter, I mentioned I was trying to get an answer from IBM regarding details on the “silicon innovation” it used. That quest is ongoing, and I hope to find some actual technology, and not just marketing mumbo-jumbo at the heart of it. Keep checking back, I will give my report here. Just a few weeks after Big Blue... » read more

Emulation 2010
By Ann Mutschler - 25 Mar, 2010 - Comments: 0

By Ann Steffora Mutschler In an industry that was once fraught with patent infringement lawsuits, hostile takeovers and other exciting corporate warfare, the hardware-assisted emulation market has quieted down considerably. That doesn’t mean it has lost its luster, though. It still plays an integral, if not ever-increasing and expanding, role in the verification efforts of most semiconductor... » read more

New x86 Technology For The Datacenter?
By Ann Mutschler - 11 Mar, 2010 - Comments: 0

I wasn’t too surprised when IBM announced new servers early this month that they claim “break constraints of 30-year technology design,” since Big Blue is constantly releasing new products that they say are groundbreaking in one way or another. Reading deeper into the news, IBM is using new semiconductor technology at the heart of its new eX5 servers that it said took its engineering t... » read more

Make vs. Buy
By Ann Mutschler - 25 Feb, 2010 - Comments: 0

By Ann Steffora Mutschler The age-old question of whether to make or buy is time immemorial, and is particularly true for the cyclical semiconductor industry. At the end of the day, the answer comes down to how the decision maker feels about having or losing control. Fifteen years ago, whether to make or buy something—be it the design, libraries, memory, implementation, verification, te... » read more

Rethinking Test
By Ann Mutschler - 11 Feb, 2010 - Comments: 0

By Ann Steffora Mutschler The responsibility of semiconductor test has long sat solely with the test engineer as the chip designer focused on the functionality of the device. However, particularly in low-power designs, when the device is being tested, much higher power levels are applied than normal functional operation – sometimes causing the device to fail. This ‘false failure’ c... » read more

Facing Up To Reality
By Ann Mutschler - 10 Feb, 2010 - Comments: 0

Welcome to the world of power awareness. Engineers are well aware that just as timing and area were previously separate considerations in the chip design process, power is also now a top-level consideration. In this blog, we will examine issues related not only to low-power in chip design, but the wide-reaching topic of power-aware design overall. Engineers today must consider the impacts of... » read more

Should Sign-Off And Implementation Be Separate Tools?
By Ann Mutschler - 28 Jan, 2010 - Comments: 0

By Ann Steffora Mutschler In the last stages of design, how data is readied for manufacturing used to be relatively straightforward. Point tools were used to implement the design via a place and route tool then the design was “signed off” with physical verification software. Sign-off is the gate the design goes through before it can go into manufacturing. The design must meet the qua... » read more

Combining Power And Synthesis
By Ann Mutschler - 14 Jan, 2010 - Comments: 0

By Ann Steffora Mutschler Each passing design node shrinks electronic designs ever smaller and more complex, which has made power management a critical design priority – even in the synthesis step in the design flow. Synthesis has always been an integral part of the design process, particularly at the RTL level. But as chip design has become more complicated, the need to raise the pro... » read more

Making DFM Work Better
By Ann Mutschler - 17 Dec, 2009 - Comments: 0

By Ann Steffora Mutschler At 65nm, design for manufacturing optimization and analysis has mostly been an afterthought. At 40nm and beyond, DFM has been pushed well up into the design phase. There are good reasons for this shift. What emerged at the 65nm node were signoff tools that understand manufacturing used in semiconductor design, said Manoj Chako, a product director for digital si... » read more

The Abstraction of Test
By Ann Mutschler - 29 Oct, 2009 - Comments: 0

By Ann Steffora Mutschler By now, semiconductor design abstraction is old hat to many engineers, but mention the term “semiconductor test abstraction” and expect a blank stare in return. Design complexity, enormous design size, and short market windows have put tremendous pressure on test to occur earlier rather than later. Even at the RTL level, where hardware test typically has not ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy