Author's Latest Posts


RISC-V Challenges And Opportunities


Semiconductor Engineering sat down to discuss open instruction set hardware and the future of RISC-V with Ben Levine, senior director of product management in Rambus' Security Division; Jerry Ardizzone, vice president of worldwide sales at Codasip; Megan Wachs, vice president of engineering at SiFive; and Rishiyur Nikhil, CTO of Bluespec. What follows are excerpts of that conversation. (L-... » read more

Thermal Challenges And Moore’s Law


Steven Woo, fellow and distinguished inventor at Rambus, looks at the evolution of graphics cards over a couple of decades and how designs changed to deal with more graphics and more heat, and why smaller, faster and cheaper doesn’t apply in this market. » read more

Making Random Variation Less Random


The economics for random variation are changing, particularly at advanced nodes and in complex packaging schemes. Random variation always will exist in semiconductor manufacturing processes, but much of what is called random has a traceable root cause. The reason it is classified as random is that it is expensive to track down all of the various quirks in a complex manufacturing process or i... » read more

Who’s Watching The Supply Chain?


Every company developing chips at the most advanced process nodes these days is using different architectures and heterogeneous processing and memory elements. There simply is no other way to get the kind of power/performance improvements needed to justify the expense of moving to a new process node. So while they will reap the benefits of traditional scaling, that alone is no longer enough. ... » read more

Curvilinear Full-Chip ILT


Leo Pang, chief product officer and executive vice president at D2S, talks about the speed improvements with full-chip inverse lithography technology, why it is so critical in stitching together large chips, and how this approach differs from traditional litho approaches. » read more

Making Sense Of ML Metrics


Steve Roddy, vice president of products for Arm’s Machine Learning Group, talks with Semiconductor Engineering about what different metrics actually mean, and why they can vary by individual applications and use cases. » read more

Monitoring Heat On AI Chips


Stephen Crosher, CEO of Moortec, talks about monitoring temperature differences on-chip in AI chips and how to make the most of the power that can be delivered to a device and why accuracy is so critical. » read more

Less Food, More Thought


A trillion "things" are expected to be connected to the Internet sometime in the next decade. No matter how power-efficient these things are, they probably will require enough coin-sized lithium batteries to drain the world's supply of element No. 3 on the Periodic Table. They also will increase the demand for power everywhere, and that's even before tacking on electric vehicles, the edge, robo... » read more

Less Margin, More Respins, And New Markets


Semiconductor Engineering sat down to discuss the impact of multi-physics and new market applications on chip design with John Lee, general manager and vice president of ANSYS' Semiconductor Business Unit; Simon Burke, distinguished engineer at Xilinx; Duane Boning, professor of electrical engineering and computer science at MIT; and Thomas Harms, director EDA/IP Alliance at Infineon. What foll... » read more

Changes In Data Storage and Usage


Doug Elder, vice president and general manager of OptimalPlus, talks about what’s changing in the storage and collection, including using data lakes and data engineering to break down silos and get data into a consistent format, and why it’s essential to define data up front based upon how quickly it needs to be accessed, as well as who actually owns the data. » read more

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