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Ed Sperling

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Ed Sperling is the editor in chief of Semiconductor Engineering.

Author's Latest Posts

More Memory And Processor Tradeoffs
By Ed Sperling - 11 Apr, 2019 - Comments: 0

Creating a new chip architecture is becoming an increasingly complex series of tradeoffs about memories and processing elements, but the benefits are not always obvious when those tradeoffs are being made. This used to be a fairly straightforward exercise when there was one processor, on-chip SRAM and off-chip DRAM. Fast forward to 7/5nm, where chips are being developed for AI, mobile ph... » read more

Multi-Physics At 5/3nm
By Ed Sperling - 11 Apr, 2019 - Comments: 0

Joao Geada, chief technologist at ANSYS, talks about why timing, process, voltage, and temperature no longer can be considered independently of each other at the most advanced nodes, and why it becomes more critical as designs shrink from 7nm to 5nm and eventually to 3nm. In addition, more chips are being customized, and more of those chips are part of broader systems that may involve an AI com... » read more

GDDR6 – HBM2 Tradeoffs
By Ed Sperling - 10 Apr, 2019 - Comments: 0

Steven Woo, Rambus fellow and distinguished inventor, talks about why designers choose one memory type over another. Applications for each were clearly delineated in the past, but the lines are starting to blur. Nevertheless, tradeoffs remain around complexity, cost, performance, and power efficiency.   Related Video Latency Under Load: HBM2 vs. GDDR6 Why data traffic and bandw... » read more

Preparing For War On The Edge
By Ed Sperling - 09 Apr, 2019 - Comments: 0

War clouds are gathering over the edge of the network. The rush by the reigning giants of data—IBM, Amazon, Facebook, Alibaba, Baidu, Microsoft and Apple—to control the cloud by building mammoth hyperscale data centers  is being met with uncertainty at the edge of the network. In fact, just the emergence of the edge could mean that all bets are off when it comes to data dominance. It... » read more

New Approaches To Security
By Ed Sperling - 09 Apr, 2019 - Comments: 0

Different approaches are emerging to identify suspicious behavior and shut down potential breaches before they have a chance to do serious damage. This is becoming particularly important in markets where safety is an issue, and in AI and edge devices where the rapid movement of data is essential. These methods are a significant departure from the traditional way of securing devices through l... » read more

The 7nm Pileup
By Ed Sperling - 04 Apr, 2019 - Comments: 1

The number of 7nm designs is exploding. Cadence alone reports 80 new 7nm chips under design. So why now, and what does this all mean? First of all, 7nm appears to be the next 28nm. It's a major node, and it intersects with a number of broad trends that are happening across the industry, all of which involve AI in one way or another. The big question now is how many of them will survive long ... » read more

Safety Critical Design In Automotive
By Ed Sperling - 03 Apr, 2019 - Comments: 0

Shiv Chonnad, hardware engineer at Synopsys, examines how to design chips for safety-critical applications such as automotive and ensure they work as planned and in accordance with ISO 26262 and the various ASIL levels. This includes how to find faults at both a chip and a system level. https://youtu.be/3dL4ZuSe5Ls » read more

Heterogeneous Design Creating Havoc With Firmware Versions
By Ed Sperling - 01 Apr, 2019 - Comments: 0

Adding different kinds of processing elements into chips is creating system-level incompatibilities because of sometimes necessary, but usually uncoordinated, firmware updates from multiple vendors. In the past, firmware typically was synchronized with other firmware and the chip was verified and debugged. But this becomes much more difficult when multiple heterogeneous processing elements a... » read more

Auto Reliability At The System Level
By Ed Sperling - 28 Mar, 2019 - Comments: 0

Carmakers and chipmakers are approaching autonomous vehicle design from very different perspectives, and while they both talk about safety and reliability as the end goals, they have widely divergent ideas about how to get there. All of this is just beginning to come into focus as carmakers vie for leadership in the autonomous vehicle space, and much of it appears to hinge on the definition ... » read more

Billion-Gate Design Connectivity
By Ed Sperling - 27 Mar, 2019 - Comments: 0

Sasa Stamenkovic, senior field application engineer at OneSpin Solutions, explains how to find and resolve connectivity issues in integrating large numbers of components in very big designs, often at the leading edge nodes and in markets such as AI. » read more

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