Author's Latest Posts


AI In Chip Design: Tight Control Required


Executive Outlook: Semiconductor Engineering sat down with a panel of experts to talk about what's needed to effectively leverage AI, who benefits from it, and where software-defined hardware works best, with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Ze... » read more

Silicon IP Revenue Spikes


EDA and silicon IP revenue grew 12.8% in Q1 2025, totaling $5.098 billion compared to $4.522 billion in the same period last year, but the real story was on the IP side, surging 29.6% year-over-year to $1.577 billion. Drilling deeper into those numbers, revenue for non-reporting IP companies — predominantly Arm — jumped 34.1% YoY to $1.031 billion. That was positive news for the IP marke... » read more

Rethinking Scan Chains In Semiconductor Test


An explosion in design complexity, fueled by increased transistor density and fundamental shifts in chip architectures, are beginning to overwhelm traditional approaches to test. Defects can show up in the clock trees that drive scan chains, and even inside blocks of scan cells, which may number in the millions. Jayant D'Souza, technical product director for yield learning products in Siemens E... » read more

Distributing Intelligence Inside Multi-Die Assemblies


The shift from SoCs to multi-die assemblies requires more and smarter controllers to be distributed throughout a package in order to ensure optimal performance, signal integrity, and no downtime. In planar SoCs, many of these kinds of functions are often managed by a single CPU or MCU. But as logic increasingly is decomposed into chiplets, connected to each other and memories by TSVs, hybrid... » read more

EDA’s Top Execs Map Out An AI-Driven Future


Artificial intelligence is permeating the entire semiconductor ecosystem, forcing fundamental changes in AI chips, the design tools used to create them, and the methodologies used to ensure they will work reliably. This is a global race that will redefine nearly every domain over the next decade. In presentations and interviews over the past several months, top EDA executives converged on th... » read more

Can You Build A Known-Good Multi-Die System?


Semiconductor Engineering sat down to discuss the challenges of designing and testing multi-die systems, including how to ensure they will work as expected, with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Zeng, senior engineering group director at Cadenc... » read more

LLMs On The Edge


Nearly all the data input for AI so far has been text, but that's about to change. In the future, that input likely will include video, voice, as well as other types of data, causing a massive increase in the amount of data that needs to be modeled and the compute resources necessary to make it all work. This is hard enough in hyperscale data centers, which are sprouting up everywhere to handle... » read more

Big Changes In Medical Electronics


Medical devices are becoming more capable, more complicated, and more deployable in the field rather than in a hospital or a doctor's office. But getting these purpose-built devices into the hands of consumers requires a whole bunch of new challenges, from safeguarding fragile on-board chemistries that can be destroyed by existing chip manufacturing and packaging processes to ensuring the mater... » read more

How Secure Are Analog Circuits?


The move toward multi-die assemblies and the increasing value of sensor data at the edge are beginning to focus attention and raise questions about security in analog circuits. In most SoC designs today, security is almost entirely a digital concern. Security requirements in digital circuits are well understood, particularly in large data centers and at the upper end of edge computing, which... » read more

Executive Outlook: Chiplets, 3D-ICs, and AI


Semiconductor Engineering sat down to discuss chiplets and the challenges of moving to 3D-ICs with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Zeng, senior engineering group director at Cadence; Anand Thiruvengadam, senior director and head of AI product ... » read more

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