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Ed Sperling

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Ed Sperling is the editor in chief of Semiconductor Engineering.

Author's Latest Posts

Workload-Specific Hardware Accelerators
By Ed Sperling - 13 Aug, 2025 - Comments: 0

Workload-specific hardware accelerators are becoming essential in large data centers for two reasons. One is that general-purpose processing elements cannot keep up with the workload demands or latency requirements. The second is that they need to be extremely efficient due to limited electricity from the grid and the high cost of cooling these devices. Sharad Chole, chief scientist and co-foun... » read more

What’s Different About HBM4
By Ed Sperling - 11 Aug, 2025 - Comments: 0

Memory bandwidth is limiting the flow of huge datasets that are needed to train AI models. There is much more data to process, store, and retrieve, but the speed at which that data moves through high-bandwidth memory (HBM) stacks is significantly lower than the speed at which data can be processed. Frank Ferro, group director for product management at Cadence, talks about the new HBM4 standard,... » read more

Agentic AI: Lots Of Little Black Boxes
By Ed Sperling - 07 Aug, 2025 - Comments: 0

AI is changing so quickly that it's not always clear how much of a security threat it poses for semiconductor design, and that uncertainty increases as AI agents are introduced into the mix. So far, the use of AI in chip design has been highly targeted. Most of what is included in design tools is some version of machine learning, bounded by tight control loops. EDA and IP vendors, large chip... » read more

Issues In Ramping Advanced Packaging
By Ed Sperling - 05 Aug, 2025 - Comments: 0

Multi-die assemblies require significantly more test data than a monolithic chip. Thermal mismatch between different layers can cause warping, which puts stress on the bonds that connect those layers, resulting in failures during testing. The big problem is that traditional daisy-chained test approaches cannot pinpoint where problems are occurring. Instead, they provide a go/no-go for the entir... » read more

How AI Will Impact Chip Design And Designers
By Ed Sperling - 31 Jul, 2025 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss the role and impact of AI in chip design with Chuck Alpert, Cadence Fellow; Sathish Balasubramanian, head of product marketing and senior director for custom IC at Siemens EDA; Anand Thiruvengadam, senior director and head of AI product management at Synopsys; Sailesh Kumar, CEO of Baya Systems; Mehir Arora, head of engineering... » read more

Changes In Scan Test Data
By Ed Sperling - 29 Jul, 2025 - Comments: 0

Bigger designs with hundred of cores are creating an explosion in the volume of scan test data, significantly bumping up the amount of time spent on test. That raises the cost of test, forcing chipmakers to trade off higher costs with reliability. The solution is to raise the level of abstraction for scan tests, using a bus and packetized data that can run at much higher frequencies than is pos... » read more

Accelerating IP Reuse
By Ed Sperling - 23 Jul, 2025 - Comments: 0

Semiconductors are no longer monolithic designs developed by a single company. There is more third-party IP from different sources — as many as 1,000 different IPs in a complex SoC — and all of that needs to be integrated and work as one system, something that can require a lot of effort and time. Insaf Meliane, product management and marketing director at Arteris, talks about how the new v... » read more

AI In The IC Equipment Ecosystem
By Ed Sperling - 21 Jul, 2025 - Comments: 0

AI is playing an increasingly critical role in improving semiconductor equipment and processes, which are necessary as the industry moves to advanced manufacturing processes. This requires more steps, tighter integration and analysis of those various steps, and better optimization of tools. David Fried, corporate vice president at Lam Research, talks about how to accelerate the development of A... » read more

Crisis Ahead: Power Consumption In AI Data Centers
By Ed Sperling - 21 Jul, 2025 - Comments: 2

AI data centers are consuming energy at roughly four times the rate that more electricity is being added to grids, setting the stage for fundamental shifts in where power is generated, where AI data centers are built, and much more efficient system, chip, and software architectures. The numbers are particularly striking for the United States and China, which are in a race to ramp up AI data ... » read more

Silent Data Corruption
By Ed Sperling - 16 Jul, 2025 - Comments: 0

Everyone expects their compute systems to generate the correct answer. When they don't, it's cause for alarm, because it's not always clear how long the problem has persisted. Even worse, chips and systems are now so complex that it may require a unique sequence of operations to trigger a silent data error, and they may show up only occasionally, and maybe only after months or years of use in t... » read more

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