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Author's Latest Posts


Implementing ESD Protection In Today’s SoCs


As the semiconductor industry transitions to FinFETs, reliability challenges are increasing. ESD designers are challenged with new issues that would require significant rethinking and redesign of their existing ESD protection strategy. With significant complexity embedded in the silicon, failure analysis and silicon debug is challenging and time consuming even to the ESD experts. Technology ... » read more

Better PMIC Design Using Multi-Physics Simulation


Energy efficiency and thermal management are gaining importance in the IC and system design community. Because the integrated circuit is the major source of power consumption and hence heat dissipation, semiconductor companies are under immense pressure to reduce the overall power envelope of the IC that goes into the system. This phenomenon is seen globally, irrespective of whether the chip... » read more

ESD Signoff No Longer A “Nice to Have” In FinFET Design Era


As the semiconductor industry transitions to finFETs, reliability challenges are increasing. ESD designers are challenged with new issues that would require significant rethinking and redesign of their existing ESD protection strategy. With significant complexity embedded in the silicon, failure analysis and silicon debug is challenging and time consuming even to the ESD experts. Technology ... » read more