Author's Latest Posts


The Search For The Next Transistor


In the near term, the leading-edge chip roadmap looks fairly clear. Chips based on today’s finFETs and planar fully depleted silicon-on-insulator (FDSOI) technologies are expected to scale down to the 10nm node. But then, the CMOS roadmap becomes foggy at 7nm and beyond. The industry has been exploring a number of next-generation transistor candidates, but suddenly, a few technologies are ... » read more

Quantum Computer Race Heats Up


For years, there has been an intense race among various nations to develop the world’s fastest supercomputers. The U.S. and Japan led the field until 2010, when China stunned the market and rolled out the world’s fastest supercomputer. And today, China continues to lead the field with a supercomputer capable of running at speeds of 33.86 petaflops per second. While the supercomputer race... » read more

Executive Insight: Luc Van den hove


Semiconductor Engineering sat down to discuss current and future process technology challenges with Luc Van den hove, president and chief executive of Imec. What follows are excerpts of that conversation. SE: The industry is simultaneously working on several new and expensive technologies. This includes extreme ultraviolet (EUV) lithography and the next-generation 450mm wafer size. The indu... » read more

Interconnect Challenges Grow


Qualcomm outlined the technology challenges facing mobile chip suppliers at a recent event. In no particular order, the challenges include the usual suspects—area scaling, power reduction, performance and cost. Another concern for Qualcomm is an often-overlooked part of the equation—the backend-of-the-line (BEOL). In chip production, the BEOL is where the interconnects are formed within ... » read more

Looking Beyond Moore’s Law


For decades, chip scaling has followed a simple linear curve. In this curve, the transistor gate-pitch scales at 0.7x every two years. This is the driving force behind Moore’s Law, which states that the number of transistors per chip roughly doubles every two years. But starting at the 16nm/14nm node, there is a change taking place in chip scaling. According to a chart from Imec, there are... » read more

Manufacturing Bits: Feb. 18


Polite cupcake helping robots Cornell and Carnegie Mellon have made a new discovery about robots. If they sound less snippy when they communicate, listeners will respond better. In fact, developers of robots should develop systems that use less confrontational language. In the study, entitled “How a Robot Should Give Advice,” researchers discovered that robots and humans are more lik... » read more

Week In Review: Manufacturing, Design, Test


Prosecutors have charged the CEO of chipmaker Entropic Communications with assaulting a model who appeared on the reality television show "Beverly Hills Nannies," according to the L.A. Times. Molecular Imprints Inc. (MII) has signed an agreement to sell its semiconductor imprint lithography equipment business to Canon. The agreement also allows for the creation of a new company that will ke... » read more

Manufacturing Bits: Feb. 11


Monolithic 3D SRAM project A group of companies have started a research project to propel the development of monolithic 3D chip technology. The research project, called COMPOSE³, involves the ability to stack transistors vertically. Within three years, the group hopes to unveil a proof of concept for building the world’s first 14nm, 3D-stacked SRAM cell based on III-V materials. Co... » read more

Week In Review: Manufacturing, Design, Test


This is no surprise, but it could be the end of an era. IBM is exploring a sale of its semiconductor business, according to FT.com. A survey, conducted by Harris Interactive on behalf of Crucial.com, revealed that when asked to choose between these two specific types of men, 84% of women who prefer to be involved with men prefer their male love interest to be "super handy" with computers an... » read more

NAND ATE Market Gets Testy


The NAND flash memory market is undergoing big changes. As planar NAND moves further down the 1xnm node regime, suppliers are ramping up devices with new cell structures, interfaces and other features. And on top of that, 3D NAND is beginning to appear in the market. The next-generation NAND devices will enable new applications in the mobile and enterprise markets, but the chips themselves p... » read more

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