Mark LaPedus

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Mark LaPedus is Executive Editor for manufacturing at Semiconductor Engineering.

Author's Latest Posts

Smartphones Dial Up New RF Processes

By Mark LaPedus - 24 Jan, 2013 - Comments: 0

By Mark LaPedus The rapid shift towards smartphones and tablets is driving the need for new and low-power chips at finer geometries. Today, the latest application processors, integrated basebands and other digital cell-phone chips are 28nm planar devices. And it won’t be long before OEMs incorporate 20nm planar and finFET devices in their systems as a means to reduce power and extend batt... » read more

Stacked Die From A Networking Angle

By Mark LaPedus - 24 Jan, 2013 - Comments: 1

By Mark LaPedus The first wave of 2.5D chips using silicon interposers are trickling out in the marketplace.FPGA vendor Xilinx was the first chipmaker to ship a 2.5D device, and Altera, Cisco, Huawei and IBM recently have talked about their respective 2.5D chip developments. Generally, Altera and Xilinx have taken a somewhat identical and straightforward approach. The two companies are sepa... » read more

What’s Before Stacked Die?

By Mark LaPedus - 13 Dec, 2012 - Comments: 0

By Mark LaPedus Advanced 2.5D/3D chip stacking has a number of challenges and is still a few years away from mass production. In fact, mass production may not occur until 2015 or 2016. But OEMs can ill afford to sit still and wait for 2.5D/3D technology to mature. So, until 2.5D/3D is ready for prime time, chipmakers and IC-packaging houses are under pressure to innovate and extend current ... » read more

Welcome To The ‘Probably Good Die’ Era

By Mark LaPedus - 13 Dec, 2012 - Comments: 0

By Mark LaPedus In today’s systems, consumers want more performance and bandwidth with a longer battery life. Some chip segments are keeping up with the demands. Still other areas are falling way behind the curve. Battery life is an obvious problem, but memory bandwidth is under the radar. “Initially, memory bandwidth nearly doubled every two years, but this trend has slowed over the pa... » read more

Foundry Landscape Changes In 3D

By Mark LaPedus - 13 Dec, 2012 - Comments: 0

By Mark LaPedus Over the last year, leading-edge silicon foundries announced their new and respective strategies in the emerging 2.5D/3D chip arena. The ink is barely dry and now the foundry landscape is changing. One new vendor, Tezzaron Semiconductor, is entering the market. The 3D DRAM supplier plans to provide select 2.5D/3D foundry services within its recently acquired fab in Austin, T... » read more

How To Make A Brain-On-A-Chip

By Mark LaPedus - 15 Nov, 2012 - Comments: 0

By Mark LaPedus In October, Draper Laboratory and the University of South Florida (USF) disclosed an ambitious plan to develop a brain-on-a-chip. The idea is to devise a “micro-environment’’ that mimics the human brain. Researchers hope to study neurodegenerative conditions such as Alzheimer’s disease, strokes and concussions. The eventual goal is to study the effects of drugs and v... » read more

Capping Tools Tame Electromigration

By Mark LaPedus - 31 Jul, 2012 - Comments: 0

By Mark LaPedus The shift towards the 28nm node and beyond has put the spotlight back on the interconnect in semiconductor manufacturing. In chip scaling, the big problem in the interconnect is resistance-capacitance (RC). Another, and sometimes forgotten, issue is electromigration. “Electromigration gets worse in device scaling,” said Daniel Edelstein, an IBM Fellow and manager of BE... » read more

Challenges Mount For Interconnect

By Mark LaPedus - 26 Jun, 2012 - Comments: 0

By Mark LaPedus There are a plethora of chip-manufacturing challenges for the 20nm node and beyond. When asked what are the top challenges facing leading-edge chip makers today, Gary Patton, vice president of the Semiconductor Research and Development Center at IBM, said it boils down to two major hurdles: lithography and the interconnect. The problems with lithography are well documented.... » read more

Cymer’s EUV Power Source Roadmap Slips

By Mark LaPedus - 03 Feb, 2012 - Comments: 0

Amid record sales for the fourth quarter, Cymer Inc. disclosed that it has delayed the shipment of its 20 Watt extreme ultraviolet (EUV) power source upgrade unit by nearly a quarter. The company also remains under pressure to deliver a separate 100 Watt power source for EUV by mid-year. The main EUV tool vendor — ASML Holding NV — expects to ship its NXE:3300B, a full-blown, 13.5nm EU... » read more

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