Big Shifts In Power Electronics Packaging

The power semiconductor market is poised for remarkable growth in the next several years, fueled by the adoption of electric vehicles and renewable energy, but it also driving big changes in the packaging needed to protect and connect these devices.

Packaging is playing an increasingly critical role in the transition to higher power densities, enabling more efficient power supplies, power delivery, and faster conversion, as well as increased reliability. With the global shift toward faster switching frequencies and greater power densities, there is a related shift in materials used for substrates, die attach, wirebonding, and system cooling.

“As we make advancements in the silicon itself, the packaging starts to become more and more important,” said Brian LaValle, director of Mid-Power Voltage MOSFETs at Infineon, in a recent webinar.

At high power and high currents, power modules are offered in discrete packages and integrated modules, providing competitive advantage for manufacturers depending on the device specifications and use conditions. Leading companies supply literally hundreds of discrete power devices, but some of the most common include through-hole packages, such as TO-247 and TO-220 with long silver leads, as well as surface-mount (SMT) components with leads such as D2PAK, DPAK, SO-8, and leadless (TOLL), PQFN and CSPs.

Topside-cooled SMT can provide lower thermal resistance because the drain tab is connected directly to the heat sink. That approach also can improve switching performance due to the smaller gate loop in the SMT. An exposed source tab can be flush with the heat sink to boost device current capability. Overall solutions include effective thermal management via single- or dual-sided cooling, and multi-die integration in framed or molded modules.

The power quad flat no-lead (PQFN) package is one of the most popular choices today, according to Amkor. This is due to its compact size (3 x 3mm to 8 x 8mm), low parasitics for very low turn-on resistance [RDS(on)], great thermal performance, and numerous multi-die, multi-clip, and wire variations. PQFN also is compatible with GaN, and it has lead-free plating and halogen-free mold compound, a wettable flank for automotive, and a dual heat sink option.

Amkor uses multiple SiC-compatible processes, as well, which include volume SiC dicing, heavy gauge wirebonding, and testing and burn-in services that meet automotive standards. “Amkor is one of the first OSATs to provide silicon carbide-based packaging to electric vehicle manufacturers,” said Sivakumar Mohandass, corporate vice president for Amkor‘s Wirebond and Power Business Unit. “We include test and burn-in services for all our power solutions, which gives customers a turnkey solution.”

Drivers and applications
Power devices are transistors and diodes that start, stop, or adjust the power in electronic systems. Power electronics are ubiquitous in our lives, and the push toward net zero is expected to double the market from 2022 levels of $22 billion to $44 billion in only a few years (2025/2026). In fact, McKinsey estimates a CAGR of 26% between 2022 and 2030 for silicon carbide power devices alone.

Discrete power devices and power modules are used in transportation, power grids, energy storage, computing, 5G infrastructure, chargers, and industrial drives, among other things. The market for new power packaging (including test) is between 20% to 25% of the total semiconductor power market.

Devices are grouped into low-, medium-, and high-voltage classes, which goes hand-in-hand with low, medium, and high current. As recently as a decade ago, voltage ratings of 30V and 40V for computing drove were the norm. Today’s voltage classes range from 40V up to 150V. This change is fueling a shift from silicon MOSFETs and IGBTs to those based on silicon carbide (SiC) and gallium nitride (GaN), whose wide bandgaps enable higher switching power characteristics, higher operating frequency, and lower RDS(on), in dramatically smaller footprints. [Note: An insulated gate bipolar transistor combines an input MOSFET with an output bipolar junction transistor.]

In smart power applications, efficiency is the most important selection factor. In contrast, automotive applications require power losses to be kept to an absolute minimum. The higher operating temperature of SiC devices and price parity with silicon systems has made SiC the material of choice for the on-board charging, traction inversion, and DC-to-DC conversion in battery EVs.

Power switches are very efficient, but even the most efficient switches have operational tradeoffs. Package inductance and electrical resistance contribute directly to the conduction and switching losses.

Power devices are structured differently than CMOS FETs. They are vertical devices rather than planar, and they do not scale the way CMOS devices do. Nevertheless, there are ways to achieve efficient scaling. “You can reduce size by joining two identical chips with direct bond copper (DBC) and cooling it from both sides, typically with air flow today, though there are many R&D activities in microfluidic cooling,” said Sam Sadri, senior process engineer at QP Technologies.

Direct bond copper is often a two-layer process, where the back of the substrate is a solid and unfeatured sheet of copper, and where the top copper layer is structured using wet chemical etching to form the electrical circuit traces. The bottom copper layer is most often soldered to a heat spreader or heatsink.

For complex devices like power modules, design technology co-optimization with the process technology is becoming more common. Synopsys, Cadence and other EDA firms recommend DTCO for devices at the beginning of system design planning. For example, Synopsys PrimePower product enables accurate power analysis for block-level and full-chip designs starting from RTL, through the different stages of implementation, and leading to power signoff. The implementation includes gate-level power analysis driven by RTL and gate-level activity and detailed power level reliability signoff.

The larger the die size, the greater the mechanical challenges associated with different material properties, particularly with the coefficient of thermal expansion (CTE). Power modules operate at higher junction temperatures, repeatedly reaching 150°C to 200°C, which puts a strain on materials. “There are also electrical requirements, such as loop inductance. For example, when you design a power supply you have to be aware of the electrical characteristics, because in a normal scenario it may not come into question. But when there is a power surge, damage can occur,” said QP Technologies’ Sadri. “The other one is obviously mechanical characterization. When there’s a mismatch of CTE, as two materials heat up and cool down, they expand and contract at different rates, causing mechanical stress — for example, between silicon’s CTE of around 4 and copper’s at around 17 (ppm/°C).”

The replacement of silicon IGBTs with SiC MOSFETs for automotive inverters and other applications is driving changes in assembly and packaging, as well. Because of its higher temperature operation, heavy-gauge wirebonding, copper clip, silver sintering, and more conductive molding compounds are required. SiC is nearly as hard as diamond, so singulation turns to that very material (diamond-coated blades) to mechanically separate the chips. A faster and less potentially damaging process was developed by 3D-Micromac that uses a thermal laser separation (TLS-Dicing) process in a two-step scribe-and-cleave process.

Lightning-fast switches
Power electronics are made up of power conversion switches, which convert battery power to electric drive motors and the powertrain solutions used to manage and reduce fuel consumption and emissions in non-electric vehicles. Power devices (MOSFETs or IGBTs) can be discrete (single operation) devices or integrated modules, which are a type of system-in-package (SiP).

Operation of power devices is always subject to losses, including conduction and switching losses. As power semiconductor fabricators move toward higher power densities, losses can be as high as 100V/cm2 at high junction temperatures. All insulating materials and interconnecting approaches must be designed to keep systems operating within specification.

The enemies of power device operation are parasitic resistance, capacitance and inductance, generally referred to collectively as “parasitics.” In addition to general shifts to SiC and GaN technologies, power packages can be either discrete, or integrated like power management ICs or PMICs in modules. Those modules can be frame-based or molded.

Power device packages provide voltage isolation, electrical connections, mechanical stability, protection from moisture, and heat dissipation for the device(s). When multiple dies are needed, they are connected in parallel in a module. For example, a power module for traction inverters, with high voltage and current capability, incorporates copper-clad ceramic substrates. This layout separates electrical potentials and frontside contact using wedge-wedge aluminum bonds (see figure 1).

Aluminum nitride conducts heat the best, but it lacks mechanical strength. Alumina (Al₂O₃) is the least expensive, but it has low thermal conductivity. Very large currents with up to a 3-level topology require multiple substrates, for instance, in an automotive traction module 50mm x 60mm in size. The base plate can be copper or an aluminum-silver-copper alloy. Infineon’s Olaf Holfeld noted that a loss density of 100W/cm², and 150 to 200°C operation are common.

Fig. 1: Frame-based power module uses a metal base plate, ceramic substrate, wire bonding and copper terminals. The cavity is filled with silicone gel for insulation. Source: Infineon

The die attach material has changed over the years from lead-containing solder to sintered silver. Sintering is a process that uses temperature, and in many cases pressure, to bond nanometer scale particles together while joining adjacent surfaces. Sintering also can be performed using copper. Infineon estimates the sintered silver die attach forms a 20X more reliable bond than traditional solder. For wire bonding, aluminum or copper will be chosen based on length, but copper can handle two times as much current as silver.

The reliability of the chip-to-substrate connection depends on the stack’s ability to endure power cycles and temperature fluctuations. Toyo Ink recently introduced a nanosilver die attach material that exhibits thermal conductivity of 300W/m-K and bond strength of 40 MPa in automotive applications. It is dispensed at 230° to 300°C using pressure-less or pressure-assisted conditions. Meanwhile, sintered silver paste can endure higher temperature operation and features thinner bond line thickness than conventional solder.

“Sintered silver has so much silver in it that is performs much better than gold-tin or solder, which has been the typical ways of attaching power chips,” said QP Technologies’ Sadri.

Though there are numerous packaging technologies used for power devices, the engineer chooses the architecture, interconnection and assembly methods that are the best match to the chip performance specs — specific resistance, Rds(on) and gate current — and cost is almost always an important factor.

For complex device types, design technology co-optimization with the process technology is becoming more common. Synopsys, Cadence and other EDA firms recommend DTCO for devices at the beginning of system design planning. Synopsys PrimePower product enables accurate power analysis for block-level and full-chip designs starting from RTL, through the different stages of implementation, and leading to power signoff.

Like DTCO, design for manufacturing (DFM) is essential in power devices. “An engineer can make one of anything. But we need to build thousands or even millions of devices with the same performance and reliability. So that’s where DFM becomes really important, that is the key,” added Sadri.

Embedded substrate approaches
One of the ways engineers can minimize parasitics is by using embedded die substrates. Here, the power device (MOSFET, IGBT) and passive devices are integrated in a substrate (stack of organic laminate layers) and connected using copper plated vias and conductive traces in the substrate. The shorter interconnects minimize distortion and power loss while lowering electrical and thermal resistance.

Fig. 2: An embedded substrate approach accomplishes reduced power loss by integrating the devices, leadframe and substrate together, thereby reducing parasitics, providing high thermal dissipation and EMI benefits. Source: ASE Group

Embedded technology provides SMT integration and a flexible routing solution. Copper via structures provide short connection paths, and the applied metal leadframe and die placement can achieve high thermal dissipation and EMI advantages.

For example, ASE’s a-EASI (advanced Embedded Active System Integration) approach is designed for a higher level of functional integration in a small footprint. The approach can be surface mounted (SMT) to the PCB and offers routing flexibility to reduce overall PCB size.

Conclusion
The materials used in power semiconductor assembly are undergoing changes as the long-established silicon devices are replaced with SiC devices with faster switching behavior and higher temperature capability. Packaging companies are beginning to adopt leadless packages like TOLL or power CSPs, as well as surface mount devices in space-critical applications.

With the current focus on battery electric vehicles, and clean energy like solar and wind, the need for reliable power supply and conversion is expected to rapidly grow. As the performance and reliability of silicon carbide power devices improve, materials like sintered silver and direct bond copper increasingly will be adopted to deliver ever-higher reliability power systems in smaller overall footprints.

Reference

1. O. Hohlfeld, “Perspective of Power Module Packaging Technology,” https://csmantech.org/wp-content/uploads/2023/06/8.1.2023-Perspective-of-power-module-packaging-technology-Hohlfeld.pdf

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