Asterix In The Land Of Sudoku: The Fast, The Elegant, And The Popular Formal Solvers


It has become a time-honored tradition for OneSpin to pose a holiday puzzle challenge to engineers everywhere. Last year, we asked you to solve the famous Einstein riddle using assertions and a formal tool: It was a great success. For the 2017–18 holiday season, we asked you to solve the hardest Sudoku in the world and prove that the solution is unique. We are delighted that even more enthusi... » read more

Tech Talk: Faster Simulation


Cadence’s Adam Sherer talks about how to speed up simulation in complex multi-core designs. https://youtu.be/lDgMwU5KN7U » read more

Merging Verification With Validation


Verification and validation are two important steps in the creations of electronic systems and over time their roles, but how they play together is changing. In fact, today we are seeing a major opportunity for rethinking this aspect of the flow, which could mean the end of them as separate tasks for many of the chips being created. As with many things in this industry, however, squeezing it... » read more

The New Deep Learning Memory Architectures You Should Know About


Artificial intelligence (AI) has come a long way. While our parents grew up with the dream to one day roam with robots, today we are interviewing Sophia, a citizen of Saudi Arabia, who is also the first humanoid robot to be granted a citizenship in any country. Deep learning, a brain-inspired discipline of AI has been around for a long time but has only recently taken off due to abundant data, ... » read more

The PCB Engineer’s Guide To Successful DDR Bus Design


This paper tackles the critical signal integrity concerns encountered when designing, simulating, and analyzing DDR buses. The first section describes DDR bus design challenges that can be particularly problematic, even intimidating, to designers. Subsequent sections describe how simulation and analysis speed up the design of a functioning DDR system to reduce PCB spins and shorten the time to ... » read more

Tail End Latency And Server Debug


In the drive to deliver highly scalable services that meet the demands of mobile users, enterprises and, increasingly, the Internet of things, the software underpinning them has become incredibly complex. At the same time, the systems that run these complex workloads have become prone to troublesome and often baffling performance issues. Response times measured over the course of millions of... » read more

How To Build Security Into Your Software Development Process


To standardize the software development life cycle (SDLC), organizations implement development methodologies to fulfill their objectives in a way that best suits their organizational goals. Whether you use Agile, Waterfall, or something in between, building security into your SDLC can improve efficiency and reduce costs if it’s done the right way. Download the eBook to: Learn how to a... » read more

DO-254: Increasing Verification Coverage By Test


Verification coverage by test is essential to satisfying both the objectives of DO-254 and interpretation in FAA Oder 8110.105. However, verification of requirements by test during final board testing is challenging and time-consuming in most cases. This white paper explains the reasons behind these challenges and provides recommendations for how to overcome them. The recommendations center ... » read more

The Bumpy Road To 5G


5G is coming, but not everywhere, not all at once, and not the fastest version of this technology right away. In fact, the probable scenario is that 5G will be rolled out first in densely populated urban areas, starting in 2020 or 2021, with increasingly widespread adoption over the next decade after that. But 5G is unlikely to ever completely replace 4G LTE, just as a smart phone today roll... » read more

Blog Review: Mar. 21


Mentor's Colin Walls shares five more quick tips for embedded software programming, including t real time systems, programming philosophy, and C++ operator overloading. Cadence's Paul McLellan digs into recently released semiconductor company ratings, the role of memory in shaking up the list, and China's plans for more 3D NAND and DRAM fabs. Synopsys' Taylor Armerding examines the latest... » read more

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