Securing AI at the Silicon Level: Solutions for a Smarter, Safer Future
By Synopsys - 06 May, 2026 - Comments: 0

This white paper explains how Synopsys Security IP embeds hardware‑rooted protection into AI SoCs and chiplets to secure their data and models. It highlights growing AI attack vectors across edge and data‑center environments and shows how technologies like PUF, tRoot HSM, interface security, and PQC create long‑term, silicon‑level trust. Why read this whitepaper: Learn how sili... » read more

The Unavoidable CMMC Deadline
By Keysight - 06 May, 2026 - Comments: 0

The U.S. Department of Defense’s (DoD) Cybersecurity Maturity Model Certification (CMMC) rollout is no longer a future concern. It is rapidly becoming a contract eligibility requirement with a fixed end date. This solution brief, drawn from Keysight’s commissioned primary research on CMMC readiness across the Defense Industrial Base (DIB), explains why the deadline is unavoidable and why or... » read more

Using AI To Monitor Dashboards In Chips And Systems
By Ed Sperling - 06 May, 2026 - Comments: 0

Key Takeaways: New types of dashboards are being used in conjunction with AI to make sense of large quantities of data. These dashboards can be used to quickly identify and fix power and heat-related problems, such as hotspots or voltage droop. Future dashboards will likely be much more customizable for different users or applications. Chipmakers are starting to use AI to ma... » read more

A Detailed Evaluation of A Production Server With High-End MRDIMM Main Memory (BSC, Micron, Intel, UPC)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Performance and Energy Benefits of MRDIMMs," was published by researchers at Barcelona Supercomputing Center, Universitat Politecnica de Catalunya, Micron and Intel Corporation. Abstract "Multiplexed Rank DIMMs (MRDIMMs) have recently emerged as memory devices that enable higher bandwidth without increasing DRAM chip frequencies. This paper presents a detailed perf... » read more

GPU Power Prediction Tool for AI Workloads (MIT, IBM)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "EnergAIzer: Fast and Accurate GPU Power Estimation Framework for AI Workloads," was published by researchers at MIT and IBM Research. Abstract "As AI workloads drive increases in datacenter power consumption, accurate GPU power estimation is critical for proactive power management. However, existing power models face a scalability bottleneck not in the modeling tec... » read more

Pre-Silicon Verification and Validation Methodology Targeting Robust RISC-V Chip Designs (BSC)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Verification and Validation (V&V)-in-the-Loop for RISC-V Design: The Holistic Vision of BZL," was published by researchers at Barcelona Supercomputing Center. Abstract "The Barcelona Zetascale Lab (BZL) project aims to strengthening Europe's capacity in the design and manufacture of RISC-V based high-performance computing chips. In this context, we present a ho... » read more

Foundry-Compatible Grating Couplers Using an Inverse Design Framework (Yale)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Multimode grating couplers via foundry-compliant inverse design," was published by researchers at Yale University. Abstract "We apply a systematic inverse design approach to discover foundry-compliant, multilayer grating couplers that can efficiently couple a number of independent waves from free space to on-chip propagating modes. For visible- and near-infrared co... » read more

SDVs: Modular Drive Architecture Using Power-Packet-Based Sensorless Control (Kyoto U.)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Modular Drive Architecture for Software-defined Vehicles Enabled by Power-packet-based Sensorless Control," was published by researchers at Kyoto University. Abstract "The transition toward software-defined vehicles requires standardization and modularization of hardware decoupled from software, along with centralized electrical/electronic architectures. While elec... » read more

Replacing GPU Compute Dies With PNM-Enabled HBM Cubes For Long-Context Decode Attention (UCSD, Columbia, Yonsei U., NVIDIA, Samsung)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving," was published by researchers at UC San Diego, Columbia University, Yonsei University, NVIDIA, and Samsung. Abstract "All current LLM serving systems place the GPU at the center, from production-level attention-FFN disaggregation to NVIDIA's Rubin GPU-LPU heterogeneous p... » read more

Understanding Why Drain-Current in GAAFETs Deviates from Thermionic Dependence at Negative Gate Voltages (Sandia National Lab, LIST)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Gate-Drain Leakage Enhanced by Drain-Induced Dielectric Barrier Lowering in Gate-All-Around Field Effect Transistors," was published by researchers at Sandia National Laboratories and Luxembourg Institute of Science and Technology. Abstract "Gate-All-Around Field-Effect Transistors (GAAFETs), now entering high-volume production as successors to fin field-effect tra... » read more

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