Chip Industry Technical Paper Roundup: May 13


New technical papers recently added to Semiconductor Engineering’s library: [table id=430 /] Find more semiconductor research papers here.   » read more

Research Bits: May 13


Benchmarking 3D-IC cooling Researchers from Massachusetts Institute of Technology (MIT) and HRL Laboratories developed a specialized chip to test and validate cooling solutions for packaged chip stacks. The chip dissipates extremely high power, generating heat through the silicon layer and in localized hot spots to mimic high-performance logic chips. It then uses diodes to measure temperatu... » read more

Conversing With Your Dishwasher


What does "Error 22" mean on your smart appliance? Today, most people have to look it up on the internet, but that's about to change. John Weil, vice president and general manager for Synaptics IoT and Edge AI Processor business unit, talks about how AI can be inexpensively and efficiently utilized by mapping directly to a database using a natural language interface. Unlike today, that informat... » read more

Security Risks Mount For Aerospace, Defense Applications


Supply chain and hardware security vulnerabilities affect all industries, but they pose additional risks for the defense sector. Over-manufacturing and re-manufacturing allow chips from friendly nations to end up in the weapons of adversaries. And side-channel attacks such as power analysis or fault injection, as well as internet-based distributed denial of service (DDoS) attacks, provide a mea... » read more

Comparisons of HW Versus SW Implementation of Warp Level Features in Vortex RISC-V GPU (Georgia Tech, IIT)


A new technical paper titled "Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU" was published by researchers at Georgia Tech and Indian Institute of Technology Bombay. Abstract "RISC-V GPUs present a promising path for supporting GPU applications. Traditionally, GPUs achieve high efficiency through the SPMD (Single Program Multiple Data) programming model. Ho... » read more

Cache Occupancy Attacks Targeting The SLC of Apple M-Series SoCs (Northeastern Univ.)


A new technical paper titled "EXAM: Exploiting Exclusive System-Level Cache in Apple M-Series SoCs for Enhanced Cache Occupancy Attacks" was published by researchers at Northeastern University. Abstract "Cache occupancy attacks exploit the shared nature of cache hierarchies to infer a victim's activities by monitoring overall cache usage, unlike access-driven cache attacks that focus on spe... » read more

Safety Architecture and Approaches for Automotive SW And HW Including ASIL D And AI/ML (Mercedes-Benz, U. Of Washington)


A new technical paper titled "Key Safety Design Overview in AI-driven Autonomous Vehicles" was published by researchers at Mercedes-Benz Research and Development North America and University of Washington . Abstract "With the increasing presence of autonomous SAE level 3 and level 4, which incorporate artificial intelligence software, along with the complex technical challenges they present... » read more

Chip Industry Week in Review


Check out the Inside Chips podcast for our behind-the-scenes analysis. The U.S. government is rescinding a Biden-era AI export rule that would have imposed complex restrictions on how U.S. chip and AI technology is sold abroad, a move welcomed by companies like Nvidia, reports Bloomberg. While new, simpler guidelines are expected in the coming months, the decision introduces short-term uncer... » read more

Overlay, Critical Dimension, And Z-Height Metrology Solutions For Advanced Packaging


The consumer’s thirst for AI-based applications is powering the ever-evolving electronics industry. Applications delivering higher levels of information in human language-like form, smarter at-home gadgets, the ability to receive a medical diagnosis without a doctor’s visit and the convenience of autonomous vehicles are among the applications powering this thirst. To better enable these app... » read more

AI For Test: The New Frontier


Dr. Ming Zhang, PDF Solutions vice president of Fabless Solutions, delivered the keynote at the TestConX 2025 conference in March. As he began his presentation, Ming borrowed the “learn, explore and share” line from Ira Feldman, the organizer of the conference, to set the tone of his talk. He promised to share what he and PDF Solutions learned and what’s useful and what’s not useful as ... » read more

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