Innovations In Distributed Functional Safety


Innovations in hardware functional safety will be available in future safety-critical products from Imagination. These patent-pending techniques are for processing cores which require Automotive Safety Integrity Level (ASIL)-B levels of protection while incurring the smallest possible area, power and performance costs. This paper outlines new Distributed Safety Mechanisms (DSMs) for CPU and ... » read more

SRAM PUF – The Secure Silicon Fingerprint


For many years, silicon Physical Unclonable Functions (PUFs) have been seen as a promising and innovative security technology making steady progress. Today, Static Random-Access Memory (SRAM)-based PUFs have been deployed in hundreds of millions of devices and offer a mature and viable security component that is achieving widespread adoption in commercial products. They are found in devices ran... » read more

Takeaways From The 2024 SPIE Photomask Technology + EUV Conference


In the autumn, I had the opportunity to attend the 2024 SPIE Photomask Technology and EUV Lithography conferences, collectively referred to as PUV or sometimes BACUS, the latter a reference to the event’s early association with the BACUS organization. This is a key annual event that brings together experts and professionals in photomask technology and EUV lithography. This year’s conference... » read more

High-Fidelity Noise Prediction for Aerospace and Automotive Industries


Accurate noise prediction is essential for designing quieter, more efficient aircraft and vehicles. However, traditional experimental methods are often expensive, time-consuming, and limited in scope. This white paper outlines how an advanced computational tool leverages large-eddy simulations (LES) to deliver accurate, cost-effective aeroacoustics simulations. Key Takeaways: Advance... » read more

NAND Flash Targets 1,000 Layers


The chip industry is pushing to quadruple the stack height of 3D NAND flash from 200 layers to 800 layers or more over the next few years, using the additional capacity will help to feed the unending need for more memory of all types. Those additional layers will add new reliability issues a number of incremental reliability challenges, but the NAND flash industry has been steadily increasin... » read more

Promising Materials Beyond Silicon (TI, AIXTRON, imec)


A new technical paper titled "Future materials for beyond Si integrated circuits: a Perspective" was published by researchers at Texas Instruments, AIXTRON SE and imec. Abstract: "The integration of novel materials has been pivotal in advancing Si-based devices ever since Si became the preferred material for transistors, and later, integrated circuits. New materials have rapidly been adopte... » read more

98 Hardware Security Failure Scenarios (NIST)


A new technical paper titled "Hardware Security Failure Scenarios: Potential Hardware Weaknesses" was published by NIST. Abstract "Hardware is often assumed to be robust from a security perspective. However, chips are both created with software and contain complex encodings (e.g., circuit designs and firmware). This leads to bugs, some of which compromise security. This publication evaluate... » read more

Manipulating Diamond Surface Chemistry By UV Laser Etching (Macquarie Univ., MIT)


A new technical titled "The effects of sub-monolayer laser etching on the chemical and electrical properties of the (100) diamond surface" was published by researchers at Macquarie University and MIT. Abstract "Tailoring the surface chemistry of diamond is critical to a range of applications from quantum science to electronics. It has been recently shown that dosing the diamond surface with... » read more

Patterning Doping On Very Large Monolayer MoS2 (NREL)


A new technical paper titled "Spatially Precise Light-Activated Dedoping in Wafer-Scale MoS2 Films" was published by researchers at National Renewable Energy Laboratory (NREL) and Renewable & Sustainable Energy Institute (RASEI). "In this work, we unravel the mechanism that drives PL* changes of MoS2 monolayers under laser illumination in ambient conditions. We demonstrate the critical ... » read more

The Vulnerability of Clock Trees to Asymmetric Aging


A new technical paper titled "The Impact of Asymmetric Transistor Aging on Clock Tree Design Considerations" was published by researchers at Israel Institute of Technology and The Hebrew University of Jerusalem. Abstract "Ensuring integrated circuits (ICs) operate reliably throughout their expected service life is more vital than ever, particularly as they become increasingly central to mis... » read more

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