Research Bits: December 5
By Jesse Allen - 05 Dec, 2023 - Comments: 0

Neuromorphic nanowires Researchers from UCLA and University of Sydney built an experimental computing system physically modeled after the biological brain. The device is composed of a tangled-up network of wires containing silver and selenium that were allowed to self-organize into a network of entangled nanowires on top of an array of 16 electrodes. The nanowire network physically reconfigure... » read more

AI Accelerator Architectures Poised For Big Changes
By Ann Mutschler - 04 Dec, 2023 - Comments: 5

AI is driving a frenzy of activity in the chip world as companies across the semiconductor ecosystem race to include AI in their product lineup. The challenge now is how to make AI run faster, use less energy, and to be able to leverage it from the edge to the data center — particularly with the rollout of large language models. On the hardware side, there are two main approaches for accel... » read more

Chip Industry Week In Review
By The SE Staff - 01 Dec, 2023 - Comments: 0

By Susan Rambo, Gregory Haley, and Liz Allan Amkor plans to invest about $2 billion in a new advanced packaging and test facility in Peoria, Arizona. When finished, it will employ about 2,000 people and will be the largest outsourced advanced packaging facility in the U.S. The first phase of the construction is expected to be completed and operational within two to three years. Synopsys p... » read more

GAA NSFETs: ML for Device and Circuit Modeling
By Technical Paper Link - 30 Nov, 2023 - Comments: 0

A new technical paper titled "A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors" was published by researchers at National Yang Ming Chiao Tung University. Abstract (excerpt) "Machine learning (ML) is poised to play an important part in advancing the predicting capability in semiconductor device compact modeling domai... » read more

Chiplet Architecture: Scalable and Cost-Efficient Systems for Irregular Applications (Princeton)
By Technical Paper Link - 30 Nov, 2023 - Comments: 0

A new technical paper titled "DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications" was published by researchers at Princeton University. Abstract "In recent years, the growing demand to process large graphs and sparse datasets has led to increased research efforts to develop hardware- and software-based architectural solutions to accelerate them. While... » read more

Alleviating the DRAM Capacity Bottleneck in Consumer Devices with NVMs
By Technical Paper Link - 30 Nov, 2023 - Comments: 0

A new technical paper titled "Extending Memory Capacity in Modern Consumer Systems With Emerging Non-Volatile Memory: Experimental Analysis and Characterization Using the Intel Optane SSD" was published by researchers at ETH Zurich, University of Illinois Urbana-Champaign, Google, and Rivos. Abstract Excerpt "DRAM scalability is becoming a limiting factor to the available memory capacity in... » read more

The Good Old Days Of EDA
By Brian Bailey - 30 Nov, 2023 - Comments: 5

Nostalgia is wonderful, but there is something about being involved in the formative years of an industry. Few people ever get to experience it, and it was probably one of the most fortuitous events to have happened in my life. Back in the early '80s, little in the way of design automation existed. There were a few gate- and transistor-level simulators, primarily for test and a few 'calculators... » read more

System State Challenges Widen
By Brian Bailey - 30 Nov, 2023 - Comments: 0

Knowing the state of a system is essential for many analysis and debug tasks, but it's becoming more difficult in heterogeneous systems that are crammed with an increasing array of features. There is a limit as to how many things engineers can keep track of, and the complexity of today's systems extends far beyond that. Hierarchy and abstraction are used to help focus on the important aspect... » read more

EDA Pushes Deeper Into AI
By Karen Heyman - 30 Nov, 2023 - Comments: 0

EDA vendors are ramping up the use of AI/ML in their tools to help chipmakers and systems companies differentiate their products. In some cases, that means using AI to design AI chips, where the number and breadth of features and potential problems is exploding. What remains to be seen is how well these AI-designed chips behave over time, and where exactly AI benefits design teams. And all o... » read more

3D-ICs May Be The Least-Cost Option
By Brian Bailey - 30 Nov, 2023 - Comments: 1

When 2.5D and 3D packaging were first conceived, the general consensus was that only the largest semiconductor houses would be able to afford them, but development costs are quickly coming under control. In some cases, these advanced packages actually may turn out to be the lowest-cost options. With stacked die [1], each die is considered to be a complete functional block or sub-system. In t... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy