Neuromorphic Hardware Accelerator For Heterogeneous Many-Accelerator SoCs


A technical paper titled “SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip” was published by researchers at Columbia University. Abstract: "Neuromorphic computing is an emerging field with the potential to offer performance and energy-efficiency gains over traditional machine learning approaches. Most neuromorphic hardware, however, has been designed wi... » read more

The Federation Needs A Taxonomy


While putting together the story about federated simulation, it brought back memories of an earlier part of my career when I spent a lot of time looking at modeling abstractions and simulation frameworks. In the mid-1990s, the notions of re-using pre-designed blocks of IP started to become popular, but the fledgling industry was in disarray. Every IP block had a different set of deliverables... » read more

Accelerating Analog Design Migration


Today’s electronic chips are commonly comprised of a mix of analog, RF, and digital components, with increasing functionalities, complexities, and numbers of transistors reaching the trillions. While the digital side of the house can take advantage of automated design implementation tools, the analog world has always been more about doing things manually and in a very “custom” way—which... » read more

Network-on-Chips Enabling Artificial Intelligence/Machine Learning Everywhere


Recently, I attended the AI HW Summit in Santa Clara and Autosens in Brussels. Artificial intelligence and machine learning (AI/ML) were critical themes for both events, albeit from different angles. While AI/ML as a buzzword is very popular these days in all its good and bad ways, in discussions with customers and prospects, it became clear that we need to be precise in defining what type of A... » read more

Formal Verification Best Practices: Investigating A Deadlock


To ensure a design is deadlock free with formal verification, one approach consists in verifying that it is “always eventually” able to respond to a request. The wording is important. Regardless of the current state and the number of cycles we must wait, in the future the design must respond. This translates very nicely using a type of SystemVerilog Assertion called “liveness propertie... » read more

Industry Pressure Grows For Simulating Systems Of Systems


Most complex systems are designed in a top-down manner, but as the amount of electronic content in those systems increases, so does the pressure on the chip industry to provide high-level models and simulation capabilities. Those models either do not exist today, or they exist in isolation. No matter how capable a model or simulator, there never will be one that can do it all. In some cases,... » read more

AI Drives Need For Optical Interconnects In Data Centers


An explosion of data, driven by more sensors everywhere and the inclusion of AI/ML in just about everything, is ratcheting up the pressure on data centers to leverage optical interconnects to speed up data throughput and reduce latency. Optical communication has been in use for several decades, starting with long-haul communications, and evolving from there to connect external storage to ser... » read more

IBM’s Energy-Efficient NorthPole AI Unit


At this point it is well known that from an energy efficiency standpoint, the biggest bang for the back is to be found at the highest levels of abstraction. Fitting the right architecture to the task at hand i.e., an application specific architecture, will lead to benefits that are hard or impossible to claw back later in the design and implementation flow.  With the huge increase in the inter... » read more

Thoughts On AI Consciousness


By Anda Ioana Enescu Buyruk and Catalin Tudor The rapid advancement of artificial intelligence (AI) has sparked profound discussions regarding the possibility of AI systems achieving consciousness. Such a development carries immense implications, forcing us to redirect our focus from studying the behavior of other organisms to scrutinizing ourselves. This article will delve into the concept ... » read more

What Happened To Portable Stimulus?


In June 2018, Accellera released the initial version of the Portable Test and Stimulus Standard (PSS), a new verification language that was slated to be the first new abstraction defined within EDA for a couple of decades. So what happened to it? Apart from a few updates at DVCon, there appears to be little talk about it today. However, the industry has its head down trying to make it work, ... » read more

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