Battling Over Shrinking Physical Margin In Chips


Smaller process nodes, coupled with a continual quest to add more features into designs, are forcing chipmakers and systems companies to choose which design and manufacturing groups have access to a shrinking pool of technology margin. In the past margin largely was split between the foundries, which imposed highly restrictive design rules (RDRs) to compensate for uncertainties in new proces... » read more

Reducing Chip Test Costs With AI-Based Pattern Optimization


The old adage “time is money” is highly applicable to the production testing of semiconductor devices. Every second that a wafer or chip is under test means that the next part cannot yet be tested. The slower the test throughput, the more automatic test equipment (ATE) is needed to meet production throughput demands. This is a huge issue for chip producers, since high pin counts, blazingly ... » read more

Impact of Clustering Methods On Partitioning Decisions For 3DICs (imec, Université libre de Bruxelles)


A technical paper titled “Impact of gate-level clustering on automated system partitioning of 3D-ICs” was published by researchers at Université libre de Bruxelles and imec. Abstract: "When partitioning gate-level netlists using graphs, it is beneficial to cluster gates to reduce the order of the graph and preserve some characteristics of the circuit that the partitioning might degrade. ... » read more

Automotive Lidar: Softening The Trade-off Between Ambiguity Range And Speed 


A technical paper titled “Overcoming the limitations of 3D sensors with wide field of view metasurface-enhanced scanning lidar” was published by researchers at Université Côte d’Azur and CRHEA. Abstract: "Lidar, a technology at the heart of autonomous driving and robotic mobility, performs 3D imaging of a complex scene by measuring the time of flight of returning light p... » read more

III–V Laser Grown on a Patterned Si Photonics Platform With Light Coupling Into Passive SiN Waveguides


A technical paper titled “Unlocking the monolithic integration scenario: optical coupling between GaSb diode lasers epitaxially grown on patterned Si substrates and passive SiN waveguides” was published by researchers at University of Montpellier, Tyndall National Institute, Munster Technological University and Polytechnic University of Bari. Abstract: "Silicon (Si) photonics has recently... » read more

Heat-Tolerant CNT-Based PUFs


A technical paper titled “CNT-PUFs: Highly Robust and Heat-Tolerant Carbon-Nanotube-Based Physical Unclonable Functions for Stable Key Generation” was published by researchers at Chemnitz University of Technology, University of Passau, Technical University of Darmstadt, and Fraunhofer Institute for Electronic Nano Systems (ENAS). Abstract: "In this work, we explore a highly robust and... » read more

Direct Synthesis of Planar (2D) Micro and Nanopatterned Epitaxial Graphene on SiC


A technical paper titled “Direct synthesis of nanopatterned epitaxial graphene on silicon carbide” was published by researchers at University of Technology Sydney, Ludwig-Maxilimians Universität München, Monash University, and Imperial College London. Abstract: "This article introduces a straightforward approach for the direct synthesis of transfer-free, nanopatterned epitaxial graphene... » read more

Week In Review: Auto, Security, Pervasive Computing


BMW, General Motors, Honda, Hyundai, Kia, Mercedes-Benz, and Stellantis will create an electric vehicle charging network, installing more than 30,000 high-powered DC charge points accessible to any cars that use Combined Charging System (CCS) or North American Charging Standard (NACS) connectors. Opening summer 2024, the network will leverage Plug & Charge technology and allow easy digital ... » read more

Week In Review: Manufacturing, Test


The Chinese government is considering easing proposed rules that require foreign office equipment makers operating in the country to transfer key product technology to China, per Nikkei Asia. In April 2022, Chinese authorities began revamping their national standards to include a new requirement that key components, such as semiconductors and laser-related items, be designed, developed, and pro... » read more

Week In Review: Design, Low Power


Arm is helping to address the ongoing talent shortage through its newly announced Semiconductor Education Alliance, with a long list of partners, including Arduino, Cadence, Cornell University, Semiconductor Research Corp., STMicroelectronics,Synopsys, Taiwan Semiconductor Research Institute, the All-India Council for Technical Education, and the University of Southampton. The Alliance... » read more

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