Digital Memristor-Based PIM From A Device And Reliability View (Northwestern, Technion)
By Technical Paper Link - 25 Nov, 2025 - Comments: 0

A new technical paper titled "A Comparative Study of Digital Memristor-Based Processing-In-Memory from a Device and Reliability Perspective" was published by researchers at Northwestern University and  Technion – Israel Institute of Technology. Abstract "As data-intensive applications increasingly strain conventional computing systems, processing-in-memory (PIM) has emerged as a promis... » read more

Roadmap for Open-Source Chiplet-Based RISC-V Systems For HPC and AI (ETH Zurich, Univ. of Bologna)
By Technical Paper Link - 25 Nov, 2025 - Comments: 0

A new technical paper titled "Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond" was published by researchers at ETH Zurich and University of Bologna. Abstract: "We present a roadmap for open-source chiplet-based RISC-V systems targeting high-performance computing and artificial intelligence, aiming to close the performance gap to proprietary designs. Starting with Occamy, the f... » read more

AI Plays Multiple Roles Within EDA
By Brian Bailey - 25 Nov, 2025 - Comments: 0

AI's infusion into our world may seem sudden and unexpected, but EDA has been quietly adopting it for more than a decade. What's changed is that it's now becoming more visible, thanks to increasingly powerful large language models (LLMs) and the need to apply them to increasingly challenging multi-physics problems. Two fundamental shifts underlie AI's increasing prominence. First, heat is be... » read more

FPGAs Find New Workloads In The High-Speed AI Era
By Liz Allan - 25 Nov, 2025 - Comments: 0

FPGAs are finding new applications in the age of artificial intelligence, high-speed wireless communications, medical and life science technology, and in complex chip architectures where they can improve the flow of data. Field-programmable gate arrays (FPGAs) enable designers to reprogram or reconfigure digital logic after the chips have been deployed, which is essential in the AI world, wher... » read more

Shaping The Future Of AI Processors: A Tech Threads Conversation With Jim Keller
By Nandan Nayampally - 25 Nov, 2025 - Comments: 0

I had the pleasure of hosting renowned computer architect and Tenstorrent CEO Jim Keller, on the latest episode of Baya Systems’ Tech Threads podcast. If you haven’t already, listen to get his insights on the need for “open” intelligence architectures and what would be needed to drive the semiconductor industry forward. What is an “open” intelligent architecture and ecosystem? As... » read more

Securing IP Integrity In Advanced SoC Design
By Sara Khalaf - 25 Nov, 2025 - Comments: 0

In today’s complex system-on-chip (SoC) design flows, intellectual property (IP) blocks are everywhere—licensed from third parties, leveraged from internal libraries, or hand-crafted by expert teams. These IPs are typically delivered in a “black box” format and are expected to remain unchanged throughout the physical design stages, from initial floorplanning to top-level placement, rout... » read more

The Real-World Impact Of Silicon Lifecycle Management On Chip Architectures
By Ann Mutschler - 25 Nov, 2025 - Comments: 0

Silicon lifecycle management (SLM) is transforming chip architectures, empowering designers to build smarter, more resilient, and secure semiconductor devices by leveraging data from manufacturing to end of life in the field. That data can be used to improve future designs, reduce margin, and continuously optimize performance and power efficiency throughout a chip's lifetime. Moreover, under... » read more

A Golden Source As The Single Source Of Truth In HSI
By Tim Schneider - 25 Nov, 2025 - Comments: 0

The hardware/software interface (HSI) is where system-on-chip (SoC) software defines the connections between the software and the underlying hardware. Maintaining a precise, synchronized HSI across all artifacts is challenging, and unmanaged deviations can propagate through the flow and affect integration schedules. Most complex SoCs rely on IP reuse, each with its own naming conventions, ha... » read more

What Is 3D-IC Technology? Fundamentals, Architecture, And Design Concepts
By Reela Samuel - 25 Nov, 2025 - Comments: 0

As process nodes continue to advance into the sub-micron era, the limitations of traditional scaling are becoming increasingly evident. Larger monolithic chips are facing challenges such as higher power density, routing congestion, and reduced yield. Three-dimensional integrated circuits (3D-IC) technology represents a breakthrough approach by stacking multiple dies vertically. This design red... » read more

Guarantee IP Integrity With Calibre IP Checker
By Siemens EDA - 25 Nov, 2025 - Comments: 0

In complex SoC designs, intellectual property (IP) blocks are critical yet vulnerable. Unintended modifications to IP during placement, routing or fill stages often go undetected by traditional DRC, leading to functional failures, performance degradation and costly re-spins. This paper introduces Calibre IP Checker, an automated, shift-left solution designed to guarantee IP integrity. It works ... » read more

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