Improving Edge Inferencing
By Ed Sperling - 02 May, 2019 - Comments: 0

Cheng Wang, senior vice president of engineering at Flex Logix, talks with Semiconductor Engineering about how to improve the efficiency and speed of edge inferencing chips, what causes bottlenecks, and why AI chips are different from other types of semiconductors. » read more

112G XSR And LR SerDes PHYs
By Rambus - 01 May, 2019 - Comments: 0

The virtuous cycle of increased computing power enabling new applications which demand more computing power continues unabated. Today, applications spanning AI, autonomous vehicles, video streaming, AR and VR all demand more bandwidth, lower latencies and higher speeds. In response, the SoCs powering the terabit routers and switches at the heart of the network must run even faster. The upgrade ... » read more

Addressing IC Reliability Issues Using Eldo
By Mentor, a Siemens Business - 01 May, 2019 - Comments: 0

Advanced, short-geometry CMOS processes are subject to aging that causes major reliability issues that degrade the performance of integrated circuits (ICs) over time. Degradation effects causing aging are hot carrier injection (HCI) and negative bias temperature instability (NBTI), in addition to positive bias temperature instability (PBTI) and time-dependent dielectric breakdown (TDDB). Below ... » read more

Joint Optimization Of Hardware And Compiler
By Synopsys - 01 May, 2019 - Comments: 0

ASPLOS is the premier forum for multidisciplinary systems research spanning computer architecture and hardware, programming languages and compilers, operating systems and networking. This presentation proposes a novel approach for joint optimization of algorithms/compilers and hardware architecture. The top-down/integrated approach that leverages the latest machine learning framework/compile... » read more

IP Requires System Context At 6/5/3nm
By Ann Mutschler - 01 May, 2019 - Comments: 0

Driven by each successive generation of semiconductor manufacturing technology, complexity has reached dizzying levels. Every part of the design, verification and manufacturing is more complicated and intense the more transistors are able to be packed onto a die. For these reasons, the entire system must be taken into consideration as a whole – not just as individual building blocks as could ... » read more

Secure Data Center Traffic
By Marvell - 01 May, 2019 - Comments: 0

With the increasing data security breaches, encrypting and protecting data-in-flight and data-at-rest in data centers has gained the highest priority for data center security. To address the challenges of securing the perimeter and within the data center from unlawful intercepts, protect data integrity and confidentiality, Cloud Data Centers are increasingly encrypting data within and across da... » read more

Blog Review: May 1
By Jesse Allen - 01 May, 2019 - Comments: 0

Synopsys' Melissa Kirschner questions whether a unified standard for safety-related code development will be enough to secure connected cars as MISRA and AUTOSAR merge C++ guidelines. In a podcast, Mentor's Brent Klingforth and John McMillan share questions and answers about rigid-flex PCB design, including the value of incorporating flexible circuits and the key challenges faced when doing ... » read more

Complexity’s Impact On Security
By Ed Sperling - 01 May, 2019 - Comments: 0

Ben Levine, senior director of product management for Rambus’ Security Division, explains why security now depends on the growing number of components and the impact of interactions between those components. This is particularly problematic with AI chips, both on the training and inferencing side, where security problems on the training side can alter models for AI inferencing. » read more

(R)evolution of the 56th Design Automation Conference Technical Program
By Harry Foster - 01 May, 2019 - Comments: 0

The Design Automation Conference (DAC), which was founded in 1964, is the longest running and largest conference focused on the design and automation of electronic circuits and systems. And 2019 was a record year in terms of research paper submissions and accepted papers. In fact, this year DAC experienced an impressive 18 percent increase in submissions, as shown in Figure 1. Figure 1: DA... » read more

MRAM: from STT to SOT, for security and memory
By Technical Paper Link - 30 Apr, 2019 - Comments: 0

Abstract: "Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is one of the leading candidates for embedded memory convergence in advanced technology nodes. It is particularly adapted to low-power applications, requiring a decent level of performance. However, it also have interests for secured applications. The PRESENT cipher is a lightweight cryptographic algorithm targeting ultra... » read more

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