Chip Design Is Getting Squishy
By Ed Sperling - 27 Feb, 2020 - Comments: 0

So many variables, uncertainties and new approaches are in play today across the chip industry today that previous rules are looking rather dated. In the past, a handful of large companies or organizations set the rules for the industry and established an industry roadmap. No such roadmap exists today. And while there are efforts underway to create new roadmaps for different industries, inte... » read more

A New Breed Of Engineer
By Brian Bailey - 27 Feb, 2020 - Comments: 6

The industry loves to move in straight lines. Each generation of silicon is more-or-less a linear extrapolation of what came before. There are many reasons for this – products continue to evolve within the industry, adding new or higher performance interfaces, risk levels are lower when the minimum amount is changed for any chip spin, existing software is more likely to run with only minor mo... » read more

Is There Finally A Silver Bullet For Software?
By Frank Schirrmeister - 27 Feb, 2020 - Comments: 0

As I am in Nuremberg for the annual embedded world conference, the overall mood here seemed a bit muted and slow on day one. There are rumors of 200 exhibitors of the roughly 1100 having pulled out due to the global health situation—we are all asked not to shake hands and smile instead—and the rainy weather doesn't help much either. With the weather turning to snow on day two, the attendanc... » read more

Timing Library LVF Validation For Production Design Flows
By WeiLii Tan - 27 Feb, 2020 - Comments: 3

Variation modeling has evolved over the past several years from a single derating factor that represents on-chip variation (OCV), to Liberty Variation Format (LVF), today’s leading standard format that encapsulates variation information in timing libraries (.libs). LVF data is considered a requirement for advanced process nodes 22nm and below. At the smallest process nodes such as 7nm and ... » read more

Keep The Wooden Horse Out Of Your Chip
By Sergio Marchese - 27 Feb, 2020 - Comments: 0

The OneSpin's Holiday Puzzle tradition has reached its fourth year: hear, hear! In December 2016, OneSpin challenged engineers to solve the Einstein riddle using assertions and a formal verification tool. In December 2017, the challenge was to model the hardest Sudoku in the world using assertions and find a solution with a formal tool. The OneSpin 2018-19 Holiday Puzzle asked engineers to desi... » read more

Simulation: Go Parallel Or Go Home
By Taruna Reddy - 27 Feb, 2020 - Comments: 0

Although complemented by other valuable technologies, functional simulation remains at the heart of semiconductor verification. Every chip project still develops a testbench, usually compliant with the Universal Verification Methodology (UVM), and a large test suite. Constrained-random stimulus generation has largely replaced hand-crafted tests, but at the expense of much more simulation time. ... » read more

An Increasingly Complicated Relationship With Memory
By Brian Bailey - 27 Feb, 2020 - Comments: 4

The relationship between a processor and its memory used to be quite simple, but in modern SoCs there are multiple heterogeneous processors and accelerators, each needing a different means of accessing memory for maximum efficiency. Compromises are being made in order to preserve the unified programming model of the past, but the pressures are increasing for some fundamental changes. It does... » read more

The Challenges Of Building Inferencing Chips
By Ann Mutschler - 27 Feb, 2020 - Comments: 0

Putting a trained algorithm to work in the field is creating a frenzy of activity across the chip world, spurring designs that range from purpose-built specialty processors and accelerators to more generalized extensions of existing and silicon-proven technologies. What's clear so far is that no single chip architecture has been deemed the go-to solution for inferencing. Machine learning is ... » read more

Bluetooth LE Audio Makes Its Debut
By Shewan Yitayew - 27 Feb, 2020 - Comments: 0

The Bluetooth Low Energy 5.2 specification introduces LE audio, which is a significant step forward for Bluetooth audio, both in terms of sounds quality and functionality. LE Audio, based on our new iEB110 IP, will enable manufacturers to create low power audio devices that offer several revolutionary new features that weren’t possible before, even with third-party proprietary solutions. T... » read more

SoC Co-Emulation Using Zynq Boards
By Michelle Mata - 27 Feb, 2020 - Comments: 0

Have you ever worked on a group project where you had to combine your work with that of a colleague of a different engineering discipline but the absence of an efficient means of doing so affected the project’s overall outcome? Well, for software and hardware engineers developing an SoC, the merging of their respective engineering efforts for verification purposes is a big challenge. Early... » read more

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