category: Blogs – SLD

category: IoT, Security & Automotive

In-Design Rail Analysis Is A Beautiful Thing
By Kenneth Chang - 22 Mar, 2018 - Comments: 0

As a long time designer, ASIC flows amaze me and making them better is my goal. Although a very complex and intricate process, each part of the ASIC flow abstracts the complexity underneath it to ultimately create silicon that could end up in your smartwatch, your electric vehicle, or the latest cell phone – how amazing! Consumers concerns include product reliability and robustness, which bri... » read more

Deep Learning Market Forces
By Mike Gianfagna - 22 Mar, 2018 - Comments: 0

Last week, eSilicon participated in a deep learning event at the Computer History Museum – “ASICs Unlock Deep Learning Innovation.” Along with Samsung, Amkor Technology and Northwest Logic, we explored how our respective companies form an ecosystem to develop deep learning chips for the next generation of applications. We also had a keynote presentation on deep learning from Ty Garibay, C... » read more

Simplifying SystemVerilog Functional Coverage
By Henry Chan - 22 Mar, 2018 - Comments: 0

Let’s say you have a block you need to verify. How do you know that the stimulus you are about to use is exhaustive enough and that you have covered the necessary scenarios/situations to prove it is working correctly? This is where functional coverage comes in. SystemVerilog’s functional coverage constructs allow you to quantify the completeness of your stimulus by recording the values that... » read more

Embedded World 2018: Security, Safety, And Digital Twins
By Frank Schirrmeister - 22 Mar, 2018 - Comments: 0

This year's embedded world in Nuremberg was again very well attended despite a cold wave in Europe. The key trends I had expected to see were safety and security, and the exhibits did not disappoint. One additional key theme that stood out to me was that of “digital twinning.” And, of course, the battle of processor ecosystems does continue. RISC-V has joined the games and feels a bit like ... » read more

Asterix In The Land Of Sudoku: The Fast, The Elegant, And The Popular Formal Solvers
By Sergio Marchese - 22 Mar, 2018 - Comments: 0

It has become a time-honored tradition for OneSpin to pose a holiday puzzle challenge to engineers everywhere. Last year, we asked you to solve the famous Einstein riddle using assertions and a formal tool: It was a great success. For the 2017–18 holiday season, we asked you to solve the hardest Sudoku in the world and prove that the solution is unique. We are delighted that even more enthusi... » read more

A Reliability Baseline Is Essential For Today’s Complex IC Designs
By Matthew Hogan - 22 Feb, 2018 - Comments: 0

Design rule checking (DRC) represents a common platform by which we can all compare relative rule complexity. The industry expectation is that all foundries will provide complete DRC and layout vs. schematic (LVS) rule decks at all process nodes for the successful tape-out of IC designs. However, not only are DRC operations growing significantly (Figure 1), but the scope of the rules needed to ... » read more

Regain Your Power With Machine Learning
By Shekhar Kapoor - 22 Feb, 2018 - Comments: 0

It wasn’t too long ago that machine learning (ML) seemed like a fascinating research topic. However, in no time at all, it has made a swift transition from a world far-off to common presence in news, billboards, workplaces, and homes. The concept itself is not new but evidently what has caused it to take off is the rapid growth of data in many applications and more computational power. Closer... » read more

Functional Safety: A Way Of Life
By Rajesh Ramanujam - 22 Feb, 2018 - Comments: 0

Rejuvenated over the holidays and back in full swing. This might be TMI, but I have been doing some meditative yoga and I seemed to have finally discovered myself. Though I am partly kidding, it does bring us to theme for this blog. As we tackle a new year and all the challenges it brings, I have been engaged with mindfulness and meditative yoga, which looks at a holistic approach to bring t... » read more

How SoC Interconnect Enables Flexible Architecture For ADAS And Autonomous Car Designs
By Kurt Shuler - 22 Feb, 2018 - Comments: 0

When the mobile phone era saw its fastest growth, the design teams that were the most innovative were able to introduce game-changing features before anyone else. Those companies also had the most configurable interconnect IP, allowing them to adapt to quickly changing market needs faster than their competition. Now, nearly a decade later, when autonomous driving is quickly moving into the m... » read more

Inside UVM, Take Two
By Vatsal Choksi - 22 Feb, 2018 - Comments: 0

In this blog, my major focus is on explaining the concepts such as Sequence, Sequencer, Driver and showing how the communication takes place from sequence to sequencer and from sequencer to driver. In the previous blog, I included a top-level diagram of the UVM structure, showing different base classes. So, let’s look at the main concepts and follow the communication mechanism they use for... » read more

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