category: System-Level Design

category: IoT, Security & Automotive

Rigid-Flex PCB Bending EM Analysis Using Clarity 3D Solver
By Cadence - 28 Oct, 2020 - Comments: 0

Rigid-Flex PCBs have been used in many modern electronic devices (such as mobile phones, laptops, and wearables, among others), due to their form factor, light weight, and cost-effectiveness. Electromagnetic (EM) analysis of Rigid-Flex PCBs has always been a challenging task for many commercially available 3D numerical solver technologies (FEM and FDTD), due to the complexity in the 3D designs.... » read more

Week In Review: Design, Low Power
By Jesse Allen - 23 Oct, 2020 - Comments: 0

M&A Microchip Technology acquired LegUp Computing, a provider of a high-level synthesis compiler that automatically generates high-performance FPGA hardware from software. The LegUp HLS tool will be used alongside Microchip’s VectorBlox Accelerator Software Design kit and VectorBlox Neural Networking IP generator to provide a complete front-end solution stack for C/C++ algorithm develope... » read more

Blog Review: Oct. 21
By Jesse Allen - 21 Oct, 2020 - Comments: 0

Rambus' Frank Ferro and IDC's Shane Rau compare the evolution of HBM and GDDR6, as well as the design tradeoffs and challenges of the two memory types. Mentor's Neil Johnson compares unit testing and formal property checking as first steps for verifying low-level RTL functionality. Synopsys' Patrick Carey considers the competing demands of delivering a product as soon as possible and maki... » read more

Week In Review: Design, Low Power
By Jesse Allen - 16 Oct, 2020 - Comments: 0

Tools & IP Cadence debuted System-Level Verification IP (System VIP), a suite of tools and libraries for automating SoC testbench assembly, bus and CPU traffic generation, cache-coherency validation, and system performance bottleneck analysis. Tests created using the System VIP solution are portable across Cadence simulation, emulation and prototyping engines and can also be extended to po... » read more

Blog Review: Oct. 14
By Jesse Allen - 14 Oct, 2020 - Comments: 0

Arm's Hongsup Shin explains a machine learning application that can determine which tests are most likely to find hardware bugs, improving efficiency and reducing the number of tests that need to be run. Synopsys' Pieter van der Wolf and Dmitry Zakharov take a look at the increasing need for low power processors optimized for machine learning tasks as IoT, smart home, and wearable devices pr... » read more

I’m Almost Done
By Hagai Arbel - 12 Oct, 2020 - Comments: 0

The city of Belgrade is renovating the street where I live. They are also building a new building next to mine so that I can see the construction work from my balcony. Last week, they blocked the street for some 20 minutes, and people got out of their cars and waited outside for the road to open. The construction workers were not in a hurry, and it seemed like everyone was ok with that, so I... » read more

Week In Review: Design, Low Power
By Jesse Allen - 09 Oct, 2020 - Comments: 0

Arm spun out Cerfe Labs to develop and license new types of non-volatile memories based on correlated electron materials (CeRAM) and ferroelectric transistors (FeFETs). Arm CeRAM researchers will join Cerfe Labs and assume ownership of the Arm joint development project with Symetrix Corporation. Read more about the new company and its technology in Cerfe Labs: Spin-On Memory. Tools & IP ... » read more

Blog Review: Oct. 7
By Jesse Allen - 07 Oct, 2020 - Comments: 0

In a blog for Arm, University of Southampton PhD student Sivert Sliper looks at how energy-driven and intermittent computing could be used to power trillions of IoT devices and introduces a SystemC-based simulator for such systems. Mentor's Chris Spear explains why transaction classes should extend from uvm_sequence_item rather than uvm_transaction when designing UVM testbenches. Cadence'... » read more

RISC-V: Will There Be Other Open-Source Cores?
By Ed Sperling - 06 Oct, 2020 - Comments: 5

Part 3: Semiconductor Engineering sat down to discuss the business and technology landscape for RISC-V with Zdenek Prikryl, CTO of Codasip; Helena Handschuh, a Rambus Security Technologies fellow; Louie De Luna, director of marketing at Aldec; Shubhodeep Roy Choudhury, CEO of Valtrix Systems; and Bipul Talukdar, North America director of applications engineering at SmartDV. What follows are exc... » read more

EDA, IP Show Surprising Strength
By Ed Sperling - 06 Oct, 2020 - Comments: 0

EDA and IP revenue surged 12.6% in Q2 to $2.78 billion, up from $2.47 billion in the same period in 2019, according to a just-released report. That growth occurred in all regions, as well. What's surprising about the report is just how strong sales were in the midst of the COVID-19 pandemic. "Revenue was up strongly from Q1, and there was enormous growth," said Wally Rhines, executive spo... » read more

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