category: Whitepapers

category: IoT, Security & Automotive

Advanced Architectures And Technologies For The Development Of Wearable Devices
By Arm - 02 Oct, 2014 - Comments: 0

One of the exciting new markets expected to see the biggest growth over the next few years is that of wearable devices. According to market research firm IHS, the worldwide market for wearable technology saw revenues of $8.5 billion in 2012 based on shipments of 96 million devices. The firm predicts future increases to $30 billion and 210 million by 2018. Today it is a largely embryonic market ... » read more

The Future Of Medical Device Certification: Greater Scrutiny And More Validation
By Mentor, a Siemens Business - 02 Oct, 2014 - Comments: 0

Given the critical nature of the functions performed by today’s medical devices, greater scrutiny along with the need for more certifiable software is on this rise. There is more interest today in government standards such as FDA 510K and IEC 62304 for medical device software. Enhanced scrutiny from government agencies can introduce unexpected delays – or even jeopardize the commercial rele... » read more

Quantifying IP Entitlement For 14/16nm Technologies
By eSilicon - 24 Sep, 2014 - Comments: 0

The scaling benefits of [getkc id="74" comment="Moore"s Law"] are being seriously tested at 28nm. It is no longer a given that the cost per gate will go down at leading edge process nodes below 28nm, e.g., 20nm though 14nm. Rising design and manufacturing costs are contributing factors to this trend. Meanwhile, the competing trend of fewer but more complex [getkc id="81" comment="SoC"] (So... » read more

Verification Planning And Requirement Tracking For Analog Design
By Mentor, a Siemens Business - 24 Sep, 2014 - Comments: 0

Verifying designs to meet all specifications across all process corners has become an intractable problem from the perspective of debugging, managing, tracking, and meeting verification goals. Implementing a CDV methodology for analog designs can evolve analog design and verification to a standard process-based method that can be tracked and its progress measured. This paper aims to extend comm... » read more

High Throughput GSPS Signal Processing For FPGAs And ASICs Using Synthesizable IP Cores
By Synopsys - 24 Sep, 2014 - Comments: 0

This whitepaper illustrates how parallel processing synthesizable [getkc id="43" comment="IP"] cores available in Synphony Model Compiler enable Giga Samples Per Second (GSPS) throughput on FPGAs, and efficient area/power trade-offs for ASIC targets. In particular, we demonstrate how Parallel FFT, FIR, and CIC blocks enable users to scale throughput beyond achievable clock frequencies, and/or r... » read more

2014 eBeam Survey Results
By eBeam Initiative - 18 Sep, 2014 - Comments: 0

An industry-wide poll highlights what the industry is thinking about EUV and mask writing at advanced nodes. To view the poll, click here. » read more

Improve Failure Analysis Success Rate With Layout-Aware Diagnosis
By Mentor, a Siemens Business - 18 Sep, 2014 - Comments: 0

In this whitepaper, we explore how a layout-aware diagnosis is a powerful tool for both failure analysis engineers, who find the root cause of a particular failing die, and for yield engineers, who need sets of diagnosis data to find the systematic yield limiters across the life of the product. Logic-based scan test diagnosis is an established software-based methodology for finding the defec... » read more

Implementation Challenges And Solutions Of Low-Power, High-Performance Memory Systems
By Rambus - 10 Sep, 2014 - Comments: 0

Mobile devices and their demand for rapid innovation have fundamentally and forever changed the semiconductor industry. These devices have fueled tremendous innovation in the last few years to bring about drastic improvements in performance, power and cost efficiency. They also demand condensed product development cycles which accelerate the rate and need for innovation. The only thing that has... » read more

Smart Grid Security
By Mentor, a Siemens Business - 10 Sep, 2014 - Comments: 0

Smart energy is an all-inclusive term that refers to upgrading the energy grid so it can support bi-directional flow of energy and data. Such an endeavor involves adding connectivity, communication, and security features not only to the smart grid but to the many devices connected to a smart grid. But how do you ensure all devices on the network are secure? This paper looks into two key softwar... » read more

RTL Design-for-Power (DFP) Methodology
By Ansys - 10 Sep, 2014 - Comments: 0

Commercial power analysis tools have been available now for over 10 years, operating at the gate and transistor level of abstraction. For analog, mixed-signal, and custom designs, transistor-level tools are utilized as both design and verification tools, meaning that they help designers analyzing power and serve as the final ‘sign-off’ to ensure that power specifications are met. For standa... » read more

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