Lensless Ultra-Miniature CMOS Computational Imagers And Sensors


We describe a new class of lensless, ultra-miniature computational imagers and image sensors employing special optical phase gratings integrated with CMOS photodetector matrices. Because such imagers have no lens, they are ultra- miniature (∼100 μm), have large effective depth of field (1 mm to infinity), and are very inexpensive (a few Euro cents). The grating acts as a two-dimensional visu... » read more

Addressing Test Cost Challenges In LPCT Designs


As companies strive to achieve higher quality and reliability for their products, and as package sizes and the number of available pins continue to shrink, there is also a persistent need to keep test costs down. Low Pin Count Test (LPCT) is one solution that Design for Test (DFT) designers turn to, and in many cases, might be the only one available to address these conflicting requirements. ... » read more

Internet Of Things Design Considerations For Embedded Connected Devices


Embedded connectivity has been around since the early days of M2M. But what is new are the many complexities and emerging standards embedded system developers need to know if they are to design the latest IoT device. This paper delves into many of the key considerations developers need to know and discusses the critical areas of IoT security and connectivity along with the importance of a prove... » read more

Interpreting UPF For A Mixed-Signal Design Under Test


This paper describes a methodology (as implemented in the Mentor Graphics Questa ADMS mixed-signal simulator) for interpreting the Unified Power Format (UPF) for analog mixed-signal designs coded in Verilog-AMS, VHDL-AMS, or SPICE. No changes to the UPF syntax or file are required. A complete implementation and a demonstration of its use in a sample case are provided as proof of concept. To ... » read more

More Effective Test: Slack-Based Transition Delay


Semiconductor companies have come to rely on delay testing to attain high defect coverage of manufactured digital integrated circuits (ICs). Delay testing uses transition delay (TD) patterns created by automatic test pattern generation (ATPG) tools to target subtle manufacturing defects in fabricated designs. Although standard TD testing improves defect coverage beyond levels stuck-at patterns ... » read more

Manage Supply Chains To Enhance ERP And MRP Operations


The key for success in mass production is consistency and control of variables. One key variable that is difficult to control is the integrity of accounting for materials. Not all materials are used in the way that MRP intended and they are often used for products other than those intended. In addition to simple materials issues, demand patterns to the factory have changed significantly in r... » read more

System-Aware SoC Power, Noise And Reliability Signoff


In globally competitive markets for mobile, consumer and automotive electronic systems, the critical success factors are power consumption, performance and reliability. To manage these conflicting requirements, design teams consider multiple options, including the use of advanced process technology nodes — especially FinFET-based devices. These advanced technology nodes allow chips to operate... » read more

How Effective Power Management Increases The Lifetime Operation Of Portable Medical Devices


To enable remote patient care and provide increased mobility in hospital settings portable medical devices, Personal Area Networks (PANs), and home health systems are seeing a significant increase in investment spending. When designing a portable medical device, decisions on processor and component selection are dependent on a range of variables which include performance, price, quality, and re... » read more

Ultra Low-Power 9D Sensor Fusion Implementation


This paper presents a case study on computing the 3D orientation of a device by means of a 9D fusion algorithm. The focus is on optimizing the fusion algorithm for execution on the DesignWare Sensor IP Subsystem. Performance measurements show the benefits of using ARC Processor EXtension (APEX) accelerators, which improve both cycle count and energy consumption in comparison to other commercial... » read more

RTL Power Reduction And High Level Synthesis Report 2013


This report covers trends in the area of low-power design and C-based design. The report analyzes the survey results of 648 engineers and engineering managers and identifies relevant emerging trends. To view this white paper, click here. » read more

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