Addressing SRAM Verification Challenges


SureCore Limited is an SRAM IP company based in Sheffield, the United Kingdom, that develops low power memories for current and next generation silicon process technologies. Its award-winning, world-leading, low power SRAM designs are process independent and variability tolerant, making them suitable for a wide range of technology nodes. Two major product families have been announced: PowerM... » read more

AI-Driven Big Data Analytics Enables Actionable Intelligence, Improving SoC Design Productivity


As the latest systems on chip (SoCs) grow in size and complexity, a vast amount of design data is generated during verification and implementation. Design data is business critical and, with the proliferation of artificial intelligence (AI) use in chip design, provides designers an opportunity to carry forward learnings and insights with every new design. To achieve first-pass success deliverin... » read more

Faster And Smarter LVS For The SoC Era


Development of a modern system-on-chip (SoC) device is a long and incredibly complex process. Design teams rely on a huge range of tools, technologies, and methodologies to get the job done. Given the ongoing advances in silicon technology and design architecture, the tools are in a constant state of evolution. Logic-versus-schematic (LVS) checking is one of those tools. This is one of the earl... » read more

E-Mobility: Navigate Safety, Interoperability, And Conformance


Although the concept of electric vehicles (EV) has been around for a while, the EV and EV supply equipment (EVSE) markets are not well-regulated or fully operational. This presents several challenges for EV and EVSE manufacturers throughout the e-mobility ecosystem. Safety, interoperability, and conformance are important criteria for enabling e-mobility, and Keysight is ready to help. Read this... » read more

AI As A Service For Signal Processing


Reality Analytics provides AI tools, optimized for solving problems related to sensors and signals. Working with acceleration, vibration, sound, electrical, RF, and proprietary signal sets, Reality Analytics tools identify signatures of real-world events or conditions in sensor and signal data, and create software that can then spot those signals in the wild, notifying applications and devices ... » read more

Realization Of Sub-30-Pitch EUV Lithography Through The Application Of Functional Spin-On Glass


Photoresist metrics such as resolution, roughness, CD uniformity, and overall process window are often aimed to realize the full potential of EUV lithography. From the view of the materials supplier, improvements over the aforementioned metrics can be achieved by optimizing the functional materials used under the resist. The underlayers can significantly enhance the resist performance by provid... » read more

Metal Oxide Resist (MOR) EUV Lithography Processes For DRAM Application


This paper reports the readiness of key EUV resist process technologies using Metal Oxide Resist (MOR) aiming for the DRAM application. For MOR, metal contamination reduction and CD uniformity (CDU) are the key performance requirements expected concerning post exposure bake (PEB). Based on years of experience with spin-on type Inpria MOR, we have designed a new PEB oven to achieve contamination... » read more

2022 Survey: Luminaries Report Positive EUV Impact On Mask Trends


The eBeam Initiatives 11th Annual Luminaries Survey from July 2022 shows • EUV viewed as a positive impact for mask revenue • EUV remains the top reason for purchasing multi-beam mask writers • Confidence remains high in ability to make curvilinear masks with availability of multi-beam mask writers less of an issue this year Click here to read the survey results. » read more

Pathfinding By Process Window Modeling


In advanced DRAM, capacitors with closely packed patterning are designed to increase cell density. Thus, advanced patterning schemes, such as multiple litho-etch, SADP and SAQP processes may be needed. In this paper, we systematically evaluate a DRAM capacitor hole formation process that includes SADP and SAQP patterning, using virtual fabrication and statistical analysis in SEMulator3D®. The ... » read more

Best Practice: Scale-Resolving Simulations In Ansys CFD


While today’s CFD simulations are mainly based on Reynolds-Averaged Navier-Stokes (RANS) turbulence models, it is becoming increasingly clear that certain classes of flows are better covered by models in which all or a part of the turbulence spectrum is resolved in at least a portion of the numerical domain. Such methods are termed Scale-Resolving Simulation (SRS) models in this paper. This r... » read more

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