Metal Oxide Resist (MOR) EUV Lithography Processes For DRAM Application


This paper reports the readiness of key EUV resist process technologies using Metal Oxide Resist (MOR) aiming for the DRAM application. For MOR, metal contamination reduction and CD uniformity (CDU) are the key performance requirements expected concerning post exposure bake (PEB). Based on years of experience with spin-on type Inpria MOR, we have designed a new PEB oven to achieve contamination... » read more

2022 Survey: Luminaries Report Positive EUV Impact On Mask Trends


The eBeam Initiatives 11th Annual Luminaries Survey from July 2022 shows • EUV viewed as a positive impact for mask revenue • EUV remains the top reason for purchasing multi-beam mask writers • Confidence remains high in ability to make curvilinear masks with availability of multi-beam mask writers less of an issue this year Click here to read the survey results. » read more

Pathfinding By Process Window Modeling


In advanced DRAM, capacitors with closely packed patterning are designed to increase cell density. Thus, advanced patterning schemes, such as multiple litho-etch, SADP and SAQP processes may be needed. In this paper, we systematically evaluate a DRAM capacitor hole formation process that includes SADP and SAQP patterning, using virtual fabrication and statistical analysis in SEMulator3D®. The ... » read more

Best Practice: Scale-Resolving Simulations In Ansys CFD


While today’s CFD simulations are mainly based on Reynolds-Averaged Navier-Stokes (RANS) turbulence models, it is becoming increasingly clear that certain classes of flows are better covered by models in which all or a part of the turbulence spectrum is resolved in at least a portion of the numerical domain. Such methods are termed Scale-Resolving Simulation (SRS) models in this paper. This r... » read more

Silicon Lifecycle Management Platform


Silicon Lifecycle Management (SLM) is an emerging paradigm within the industry that is making product development and deployment more deterministic. In-silicon observability and insight are key when it comes to SLM and as an industry we can no longer afford to be blind to what is happening inside the chip. SLM is starting to close the loop between design and in-field. Click here to read more. » read more

Detection Of Electric Vehicles And Photovoltaic Systems In Smart Meter Data


In the course of the switch to renewable energy sources, there is a shift from a few large energy sources (power plants) to a large number of small, distributed energy sources (e.g., photovoltaic systems) and energy storage devices (e.g., electric vehicles). This results in the need to know and identify these energy sources and sinks as soon as new devices are installed, in order to ensure grid... » read more

PLANAR: A Programmable Accelerator For Near-Memory Data Rearrangement


Many applications employ irregular and sparse memory accesses that cannot take advantage of existing cache hierarchies in high performance processors. To solve this problem, Data Layout Transformation (DLT) techniques rearrange sparse data into a dense representation, improving locality and cache utilization. However, prior proposals in this space fail to provide a design that (i) scales with m... » read more

Analysis Of Pattern Distortion By Panel Deformation And Addressing It By Using Extremely Large Exposure Field Fine-Resolution Lithography


The growing demand for heterogeneous integration is driven by the 5G market. This includes smartphones, data centers, servers, high-performance computing (HPC), artificial intelligence (AI) and internet of things (IoT) applications. Next-generation packaging technologies require tighter overlay to accommodate larger package sizes with fine-pitch chip interconnects on large-format flexible panel... » read more

Quantification Of Steels And Alloys Using A Dual Source Multidetector System On SEM


The accurate and precise analysis of steels and alloys is essential for understanding their mechanical and thermal properties. Such materials often have a wide range of elements at various concentrations down to trace ppm levels. Accordingly, it is not possible to determine the concentrations of all elements with a standard scanning electron microscope (SEM) and an energy dispersive spectromete... » read more

GUC GLink Test Chip Uses In-Chip Monitoring And Deep Data Analytics For High Bandwidth Die-To-Die Characterization


Advanced ASIC leader Global Unichip Corp (GUC) has developed GLink, a high-bandwidth, low-latency, and power-efficient die-to-die (D2D) interface. GLink offers the industry’s highest optimized interconnect solution for both CoWoS and InFO packaging technologies. The GUC and proteanTecs collaboration started with GUC’s second generation of GLink, known as GLink 2.0. The project target was... » read more

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