category: Whitepapers

category: IoT, Security & Automotive

Faster Analog Design Closure With Early Parasitic Analysis Flow – Part 1
By Synopsys - 22 Sep, 2021 - Comments: 0

In part 1 of this series, Denis Goinard, Director of Engineering at Synopsys, discusses how Synopsys provides a unified workflow to accurately estimate, measure, extract and simulate parasitics by bringing signoff tools into the design process, enabling faster design convergence. Click here to play the video. Note: This is a Synopsys 'video white paper.' For more video white papers, click h... » read more

Evaluating The Impact Of STI Recess Profile Control On Advanced FinFET Device Performance
By Coventor - 15 Sep, 2021 - Comments: 1

In this paper, a 5nm FinFET flow was built using the SEMulator3D virtual fabrication platform. Different STI (shallow trench isolation) recess profiles were investigated using the pattern-dependent etch capabilities of SEMulator3D, including changes in trenching/footing profile, fin height and imbalance fin height. The impact of STI recess profile on device performance was then investigated usi... » read more

Qualifying The ExposedPad TQFP For AEC-Q006 Grade 0
By Amkor - 15 Sep, 2021 - Comments: 0

Semiconductor packages used in various vehicle applications require high reliability. As technological innovations in the automotive market increase, the demand for highly reliable packaging is increasing for applications in autonomous driving, human interfaces, electric vehicles (EVs), hybrid electric vehicles (HEVs) and more. Package reliability is essential because automotive packages must p... » read more

Are Surfaces Of Silicon Hardmasks Adaptive?
By Brewer Science - 15 Sep, 2021 - Comments: 0

Silicon hardmask (Si-HM) materials used in lithography processes play a critical role in transferring patterns to desired substrates. In addition, these materials allow for the tuning of optical properties such as reflectivity and optical distribution for better lithography. Si-HM materials also need to possess good compatibility with photoresists before and after optical exposure, during which... » read more

Shortest Resistance Path Deception In ESD Protection Circuit P2P Debug
By Siemens EDA - 08 Sep, 2021 - Comments: 1

Verifying and fixing ESD protection circuit violations is an essential step in tapeout sign-off flows for today’s IC chip designs. As one of the most commonly used ESD verification flows, the point to point (P2P) flow checks the resistances of ESD discharge paths in layout designs to ensure they are within design thresholds. However, when debugging P2P violations, information such as the shor... » read more

An 8 Bit To 12 Bit Resolution Programmable 5 MSample/s Current Steering Digital-To-Analog Converter In A 22 nm FD-SOI CMOS Technology
By Fraunhofer IIS/EAS - 08 Sep, 2021 - Comments: 0

Authors: Jeongwook Koh, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany Shishira S. Venkatesha, Dresden University of Technology, Dresden, Germany Sunil S. Rao, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany Marcel Jotschke, Division Engineering of Ad... » read more

Edge Computing: New Support For Digital Twins
By Ansys - 08 Sep, 2021 - Comments: 0

Digital twins are one of the most exciting technology developments to emerge over the past few years. By creating a virtual model of a physical product, then simulating its real-time operation, companies are optimizing maintenance, predicting critical maintenance events and fueling innovation via actual performance feedback. Because simulation requires computational resources and the associated... » read more

Designing High-Performance Electronics For Today’s Hyperconnected Systems
By Cadence - 08 Sep, 2021 - Comments: 0

With the rapid evolution of hyperconnected devices that are managing constant and near-instantaneous data from anywhere and at any time, designing at each new technology node must overcome design and integration complexity. To do so requires automated solutions to process the scale of modern designs. Cadence system analysis solutions operate on unimaginably huge amounts of data, scaling algorit... » read more

Gallium Nitride — Gate Drive Solutions For CoolGaN 600V HEMTs
By Infineon - 08 Sep, 2021 - Comments: 0

This paper explains the gate drive requirements for Infineon’s CoolGaN 600 V e-mode HEMTs. Various driving solutions are discussed, ranging from the standard RC-coupled driver to a new differential drive concept utilizing dedicated gate driver ICs. In half-bridge topologies, a hybrid configuration combining isolated and non-isolated drivers could be an exciting alternative. Practical applicat... » read more

Functional Safety Working Group
By Accellera - 08 Sep, 2021 - Comments: 0

With the increasing demand of compute power, the electrical and electronic systems deployed in safety-critical applications become more and more complex. This complexity also extends to Functional Safety (FS) requirements, and it affects all parts of the system including hardware and software components. Addressing FS requires specific safety activities and operations, documented in what the... » read more

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