category: Whitepapers

category: IoT, Security & Automotive

Early, Accurate, Signoff-Correlated Power Analysis
By Synopsys - 21 Apr, 2021 - Comments: 0

Power estimation has always been a fundamental part of semiconductor development, but it has grown in importance in recent years. Virtually every application domain has power limitations that must be satisfied before a chip is fabricated. There is no effective way to fix power issues in the lab or in the field, so pre-silicon estimation must be accurate. The short development cycles for many ty... » read more

Best Practices For Efficient And Effective Planar EM Simulation
By Cadence - 21 Apr, 2021 - Comments: 0

Designers of today’s complex, multi-featured communications products require accurate and fast electromagnetic (EM) simulation to deliver cost-effective, high-performance products to market in ever-shrinking windows of opportunity. The Cadence AWR AXIEM 3D planar method-of-moments (MoM) EM analysis simulator within the AWR software portfolio delivers the accuracy, capacity, and speed designer... » read more

What You Should Consider When Choosing A Processor IP Core
By Codasip - 21 Apr, 2021 - Comments: 0

Most integrated circuits include at least one processor core and some embedded software. In the case of more complex systems-on-chip (SoC), there may be application processors running the main software, and operating system plus multiple specialised subsystems handling functions such as communications, security, and sensors. Requirements for processing vary considerably and there is a wide choi... » read more

Advanced Packaging For Improved Network Communications
By Amkor - 14 Apr, 2021 - Comments: 0

The global demand for data increases day-by-day. At the same time, the data transmission rate will increase to exceed 1 Terabits per second (Tbps) near the middle of this decade. To address this situation and provide a third alternative, engineers are increasingly looking into the chiplet approach with multiple smaller dies integrated in a single package. Only the logic portion that needs to... » read more

SVT (Six Stacked Vertical Transistors) SRAM Cell Architecture Introduction: Design And Process Challenges Assessment
By Coventor - 14 Apr, 2021 - Comments: 0

This paper presents a new design architecture for advanced logic SRAM cells using six vertical transistors (with carrier transport along the Z direction), stacked one on top of each other. Virtual fabrication technology was used to identify different process integration schemes to enable the fabrication of this architecture with a competitive XY footprint at an advanced logic node: a unit cell ... » read more

Formal Verification Experiences
By Siemens EDA - 07 Apr, 2021 - Comments: 0

Several companies have used formal verification to perform silicon bug hunting. That is one of the most advanced usages of formal verification. It is a complex process that includes incorporating multiple sources of information and managing numerous success factors concurrently. This paper will present a “spiral refinement” bug hunt methodology that captures the success factors and guides t... » read more

MIPI D-PHY RX⁺: An Optimized Test Configuration
By Mixel - 07 Apr, 2021 - Comments: 0

With the proliferation of the mobile platform, the accelerating adoption of MIPI beyond the traditional mobile platform and into safety related applications, testability of MIPI® PHY is becoming a key requirement. While the D-PHY is the MIPI PHY with the widest adoption in the industry today, the RX+ is a D-PHY receiver configuration optimized for full-speed production testing. The presentatio... » read more

Benefits Of Multilevel Topologies In Power-Efficient Energy Storage Systems (ESS)
By Infineon - 07 Apr, 2021 - Comments: 0

In this paper, we discuss the adaption of efficient energy storage systems (ESS) in residential solar and utility-scale applications. System requirements and possible topologies are looked into. For utility-scale, we introduce a multilevel converter topology concept. Click here to read more.   » read more

Load-Pull Analysis For Optimizing PA Performance
By Cadence - 07 Apr, 2021 - Comments: 0

In load pull calculations, power amplifiers are going to need harmonic load pull analysis and load pull contours with wideband electromagnetic tuners. Working with RFIC power amplifiers is difficult for the myriad of concurrent design elements that they affect, transmission line voltage, signal interference, and impedance to name a few. In load pull calculations, power amplifiers are going t... » read more

6 Steps To Successful Board Level Reliability Testing
By Ansys - 07 Apr, 2021 - Comments: 0

For semiconductor manufacturers entering the automotive environment, the lack of universal qualifications standards often leads to inconsistent reliability expectations. The most efficient solution is to establish a robust and thorough BLR testing plan that is uniquely designed for a specific manufacturer validated by a broad range of industry experiences. 6 Steps to Successful Board Level R... » read more

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