A technical paper titled “A Comprehensive RF Characterization and Modeling Methodology for the 5nm Technology Node FinFETs” was published by researchers at IIT Kanpur, MaxLinear Inc., and University of California Berkeley.
“This paper aims to provide insights into the thermal, analog, and RF attributes, as well as a novel modeling methodology, for the FinFET at the industry standard 5nm CMOS technology node. Thermal characterization shows that for a 165K change in temperature, the Sub-threshold Slope (SS) and threshold voltage vary by 69 % and ~70 mV, respectively. At room temperature, a single gate contacted n-FinFET RF device exhibits a cutoff and maximum oscillation frequency of ~100 GHz and ~170 GHz, respectively. Analog and RF Figures of Merit (FoMs) for 5 nm technology at a device level and their temperature sensitivity are also reported. The industry standard BSIM-CMG model is modified to capture the impact of self-heating (SH) and parasitics. The SH model is based on measured data, and the modeling approach renders it independent of other model parameters. To the authors’ knowledge, an iteration free approach to develop a model-card for RF applications is explained for the very first time. Excellent agreement between the measured data and the model indicates that our methodology is accurate and can be used for faster PDK development.”
Find the technical paper here. Published July 2023.
S. S. Parihar et al., “A Comprehensive RF Characterization and Modeling Methodology for the 5nm Technology Node FinFETs,” in IEEE Journal of the Electron Devices Society, vol. 11, pp. 444-455, 2023, doi: 10.1109/JEDS.2023.3298290.
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