SRAM at low temps; DeepSeek RL; TSVs; new memory class; 3nm SRAM; quantum chiplet architectures; integrated photonics; 2D TMDs; HW IP protection; analog AI accelerator.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| SRAM and Mixed-Signal Logic With Noise Immunity in 3nm Nano-Sheet Technology | IBM |
| DeepSeek-R1: Incentivizing Reasoning Capability in LLMs via Reinforcement Learning | DeepSeek |
| Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures | University of Stuttgart, IIT Kanpur, National Yang Ming Chiao Tung University, Khalifa University, and TU Munich |
| Learning in Log-Domain: Subthreshold Analog AI Accelerator Based on Stochastic Gradient Descent | Imperial College London |
| 3D integration of pixel readout chips using Through-Silicon-Vias | CERN, IZM Fraunhofer and University of Geneva |
| Managed-Retention Memory: A New Class of Memory for the AI Era | Microsoft |
| Library-Attack: Reverse Engineering Approach for Evaluating Hardware IP Protection | University of Florida and Indiana University |
| Modular Compilation for Quantum Chiplet Architectures | Northwestern University |
| AlGaN/AlN heterostructures: an emerging platform for integrated photonics |
Humboldt-Universität zu Berlin and Ferdinand-Braun-Institut (FBH) |
| Computational Assessment of I–V Curves and Tunability of 2D Semiconductor van der Waals Heterostructures | Chalmers University of Technology |
Find all technical papers here.
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