DARPA CHIPS Program Pushes For Chiplets

While the semiconductor industry plugs away at More Than Moore innovation, the U.S. government is guiding its own SoC development. A new program kicked off last year called ‘Common Heterogeneous Integration and IP Reuse Strategies’ or CHIPS to take its own approach the incredibly high cost of SoC design and manufacturing.

DARPA said it recognizes that the explosive growth in mobile and telecommunication markets has pushed the semiconductor industry toward integration of digital, analog, and mixed-signal blocks into SoC solutions, and that while advanced CMOS technology has enabled this integration, it has also led to a rise in costs associated with design and processing. Driven by aggressive digital CMOS scaling for high-volume products, IP reuse has emerged as a tool to help lower design costs associated with advanced SoCs but the monolithic nature of state-of-the-art SoCs is not always acceptable for DoD or other low-volume applications due to factors such as high initial prototype costs and requirements for alternative material sets. Because of these factors, to enhance overall system flexibility and reduce design time for next-generation products, the CHIPS program seeks to establish a new paradigm in IP reuse, according to the DARPA website.

The CHIPS program is pushing for a new microsystem architecture based on the mixing and matching of small, single-function chiplets into chip-sized systems as capable of an entire printed circuit board’s worth of chips and components. (Source: DARPA)

According to Dan Green, the CHIPS program manager, the crux of the program is to develop a new technological framework in which different functionalities and blocks of intellectual property—among them data storage, computation, signal processing, and managing the form and flow of data—can be segregated into small chiplets, which then can be mixed, matched, and combined onto an interposer, somewhat like joining the pieces of a jigsaw puzzle. Conceivably an entire conventional circuit board with a variety of different but full-sized chips could be shrunk down onto a much smaller interposer hosting a huddle of yet far smaller chiplets. Central to the design and intention of the program is the creation of a new community of researchers and technologists that mix-and-match mindsets, skillsets, technological strengths, and business interests. “If the CHIPS program is successful, we will gain access to a wider variety of specialized blocks that we will be able to integrate into our systems more easily and with lower costs. This should be a win for both the commercial and defense sectors.”

DARPA’s Dr. Daniel Green, Microsystems Technology Office (MTO), Program Manager (Source: DARPA)

Among the specific technologies that could emerge from this newly formed research community are compact replacements for entire circuit boards, ultrawideband radio frequency (RF) systems, which require tight integration of fast data converters with powerful processing functions, and, by combining chiplets that provide different accelerator and processor functions, fast-learning systems for teasing out interesting and actionable data from much larger volumes of mundane data.

Late last month, DARPA announced the prime contractors for the program which are Lockheed Martin, Northrop Grumman, Boeing, Intel, Micron, Cadence, Synopsys, Intrinsix, Jariet Technologies, University of Michigan, Georgia Institute of Technology, and North Carolina State University. Many of these prime contractors will be working with additional partners to extend the village of innovators working on the CHIPS program.

Bill Chappell, director of DARPA’s Microsystems Technology Office said in a statement, “By bringing the best design capabilities, reconfigurable circuit fabrics, and accelerators from the commercial domain, we should be able to create defense systems just by adding smaller specialized chiplets. The CHIPS program is part of DARPA’s much larger effort, the Electronics Resurgence Initiative (ERI), in which we are striving to build an electronics community that mixes the best of the commercial and defense capabilities for national defense.”

DARPA’s Dr. William Chappell, Microsystems Technology Office (MTO), Office Director
(Source: DARPA)

The ERI will involve roughly $200 million annual investments for the next four years in materials research, device designs, and circuit and system architecture. The next round of investments are expected to be announced this month.

While the companies involved can’t speak too much on their involvement with this program publicly yet, it’s an interesting area to watch. Surely there will be learnings that will be applicable in the commercial realm.

A call to DARPA has not yet been returned.