Expanded Material Metrology For Refined Etch Selectivities

Trends in advanced device fabrication require combined lithography-etching multi-patterning sequences and self-aligned multi-patterning to form devices’ finest features at subwavelength dimensions.

As EUV lithography (13.5 nm) progresses to larger numerical apertures and new thin resists, new multipatterning sequences must be developed with mutually compatible resists and proximal layers to avoid resist poisoning, encourage adhesion, and enable expended materials to be easily removed without harming similar materials. Subsequent pattern transfers to form device structures by etching require mutually etch-exclusive resists, masking, and spacer materials, where each can be selectively removed by an etch process that leaves the other materials unaffected.

Materials’ resistances or susceptibilities to different etch chemistries are ultimately determined by their etching performances. Material etching rates are defined by the differences in thickness measurements made prior to and after exposure to specific wet or dry etchants for specific time intervals. Selectivity is a relative comparison of the ratio of different materials’ etching rates in an etchant where, for example, a patterning hardmask must have low selectivity compared to the underlying material that it protects.

In addition to thickness measurements, determination of materials’ distinguishing chemical and physical properties can serve as both fingerprints and predictors of etching rates. Fourier transform infrared spectroscopy (FTIR) provides further such perspectives to the processes by adding bonding and composition data to the defining characteristics for materials’ etch selectivities.

Both wet and dry etching are used for critical processes in advanced device fabrication. For example, 3D NAND employs 193 immersion lithography patterning of hardmasks used for bitline channels and isolation slits’ dry and wet etches. The high aspect ratio reactive ion etching (HAR RIE), through nearly 10 microns of more than 100 alternating layers of PECVD silicon nitride (SiN) and silicon oxide (SiO), is among the industry’s most challenging processes, with channel height:diameter ratios approaching 100:1. Manufacturers rely on either poly silicon or amorphous carbon hardmasks to selectively protect underlying layers over long etch times, while uniformly transferring CDs to the mutually etch-selective SiN and SiO layers during rapid etchant gas switches. Wet etching is subsequently used to selectively remove hundreds of interleaved SiN layers, while preserving the surrounding SiO layers. The PECVD SiO and SiN stoichiometries and hydrogen contents are directly related to the materials’ wet and dry etch selectivities to different etchants. FTIR measurements of the materials’ bond vibrational peaks, such as silicon-nitrogen, silicon-oxygen, and nitrogen-hydrogen absorbances, enables determinations of material stoichiometries and changes resulting from processing.

Combined dry and wet etches are also employed to fabricate DRAM cup style storage capacitors. Moving to advanced process nodes, device makers transitioned from PETEOS to LPCVD silicon oxide. In this process evolution, FTIR is a key material metrology step used to monitor boron, phosphorus, silicon oxide, and hydrogen in borophosphosilicate glass (BPSG) films in the mold layers. The film’s boron and phosphorous concentrations purportedly affect the wet etch selectivity for the mold profile control following initial HAR RIE. The latest node flow uses BPSG deposited for the lower portion of the oxide mold and TEOS for the upper portion. The different mold oxides may be used to tune etch selectivity for opening the HAR profile.

Fig. 1: DRAM storage node formation.

BPSG is used as a mold oxide for the complex DRAM storage node cup structures. The BPSG layer is deposited above the storage node access transistor contacts and subsequently etched by a combination of dry and wet etching to form holes. The walls of the holes are then deposited with TiN to form the bottom electrode and the BPSG layer is removed by wet etching, leaving TiN tubes as the substrate for capacitor dielectric atomic layer depositions. One of the key characteristics that defines the quality of the device is the side wall angle of the hole etched in the BPSG before the deposition of the bottom electrode. A tilt in the sidewall will result in a tilt of the whole structure, impacting the defectivity and performance of the device. The critical control of the sidewall angle is performed through the wet etch step.

Fig. 2: DRAM storage node formation: side-wall angle control.

The uniformity of the etch to form holes in the mold oxide is the key parameter to control the sidewall angle. Because the etch rate increases with the phosphorous concentration, but decreases with the boron concentration, good control of the dopants is key to controlling the storage node holes’ etching profiles and thus improving the yield of the devices.

Fig. 3: FTIR measurements principles.

In the use of BPSG as a mold oxide, measurements of the boron and phosphorous concentrations can be performed directly on product wafers. This suppresses the need to use monitor wafers for controlling the dopant concentrations, thus saving deposition reactor time for production. Direct measurements of the product wafers also enables more accurate control of depositions than using monitor wafers – and consequently, the etch rate on the product wafers – since the dopant concentrations measured on monitor wafers may differ significantly from the actual concentrations on the product layers.

Fig. 4: Boron and phosphorous concentration measurements on the FTIR system enable a feedback loop to adjust the deposition parameters and a feed forward loop to control the etch parameters.

Because measurements of the boron and phosphorous concentrations in the BPSG layers are performed immediately after the mold deposition, layer etch rates can be predicted directly prior to etch processing. This enables use of FTIR measurements in a feedback loop for run-to-run control of the deposition parameters in the reactor, and also as a feed forward loop to enable adjustment of the critical conditions of the dry and wet etch steps based on the specific results for boron and phosphorus dopant concentrations.