tag: Qualcomm

Moore’s Law Revisited
By Ed Sperling - 25 Oct, 2012 - Comments: 0

It’s no surprise that Moore’s Law can continue for many more generations. Intel’s road map already extends down to 5nm, most likely with carbon nanotube FETs, tunnel FETs, graphene TSVs and maybe even fully depleted SOI to replace bulk CMOS. The rest of the industry has been hanging back a node or two, gliding on the coattails of what Intel and companies like IBM, Samsung and STMicroel... » read more

Experts at the Table: Stacking the Deck
By Ed Sperling - 23 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler System-Level Design sat down to discuss challenges to 3D-IC adoption with Samta Bansal, product marketing for applied silicon realization in strategy and market development at Cadence; Carey Robertson, product marketing director at Mentor Graphics; Karthik Chandrasekar, member of technical staff in IC Design at Altera; and Herb Reiter, president of EDA2ASIC Consulting... » read more

Being Different Is Bad
By Ed Sperling - 23 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler Today’s SoCs contain as much as 80% existing IP that either has been re-used from previous projects or obtained from a third party. Models are created of this hardware IP, as well as new portions of the design, in order to create a virtual prototype that allows the engineering team to see the complete system by running software and applications. While this a... » read more

G450C To Align Vendors During 450mm Transition
By Ed Sperling - 16 Aug, 2012 - Comments: 0

By David Lammers Innovation and synchronization among multiple companies do not often go hand in hand. But for the 450mm wafer transition to provide its full benefits, chip makers and their suppliers will need to do more than a simple wafer size scale up. That may lead the Global 450 Consortium (G450C) to serve as the proving ground for efforts to more closely match the electrical results o... » read more

The Rise Of The Power Architect
By Ed Sperling - 09 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler Call them power czars, power gurus or power architects, this role within design teams is gaining importance with the need to understand, manage and control the power budget throughout the entire design process. As such, power architects are in high demand today with power architecture teams doubling in size within a year or two. Driving the need for this highly s... » read more

Firms Rethink Fabless-Foundry Model
By Ed Sperling - 31 Jul, 2012 - Comments: 0

By Mark LaPedus As chipmakers move toward 20nm designs, finFETs and 3D stacked devices, the industry is beginning to re-think the fabless-foundry model. Leading-edge foundries are finally getting serious about the “virtual IDM” model, in which vendors will act more like integrated device manufacturers (IDMs), as opposed to being mere production partners. In this model, the found... » read more

Increasing Certainty For 20nm Design
By Frank Schirrmeister - 25 Jul, 2012 - Comments: 0

By Frank Schirrmeister At the recent Design Automation Conference two topics were getting very special attention: Design at 20nm and System-Level Design. This is very indicative of the very opposite trends we have been facing in semiconductor designs for the last couple of decades. On the one hand, the actual design units get smaller and smaller, and we are today happily designing for technolo... » read more

The Trouble With Models
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ann Steffora Mutschler Models and modeling concepts seem to be on the tip of every tongue these days. Once the promise of sparking true ESL design, the use of system-level models has settled into something more like enabling software development. There is also talk of leveraging models across the supply chain, but is this really possible yet? The concept of doing this incremental refinem... » read more

The 28nm Foundry Crunch
By Ed Sperling - 29 May, 2012 - Comments: 0

By Mark LaPedus Faced with huge and unforeseen demand at the 28nm node, leading-edge foundries are scrambling to play catch-up and are boosting their fab capacities at a staggering pace. But analysts warn that 28nm foundry capacity will be tight throughout 2012, and perhaps into 2013, putting some chipmakers in a pinch. Many blame the 28nm foundry capacity shortfall on a combination of t... » read more

Power Becomes Bigger Issue In Stacked Die
By Ed Sperling - 10 May, 2012 - Comments: 0

By Ed Sperling Concern over getting the heat out of stacked die is well defined, even if the current raft of existing and proposed solutions ranges from ineffective to exotic and expensive. What is less well understood is how to plan for and manage power inside of stacked die. While power and heat frequently go hand in hand—where there is heat there is almost always power dissipation—t... » read more

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