Photonics Moves Closer To Chip

Silicon photonics is resurfacing after more than a decade in the shadows, driven by demands to move larger quantities of data faster, using extremely low power and with minimal heat.

Until recently, much of the attention in photonics focused on moving data between servers and storage. Now there is growing interest at the PCB level and in heterogeneous multi-chip packages. Government, academic and and commercial investments in this technology are all on the rise, and there is a renewed sense of optimism that this technology will become useful across more markets and applications.

“In the early 2000s there was a lot of energy being put into photonics,” said Gnyaneshwar Ramakrishna, chairman of the photonics technical committee for IEEE’s Components, Packaging and Manufacturing Technology Society. “That died down for a while. But now that we’re able to show speeds of 25 Gbps to 100 Gbps, photonics is coming back in a big way. It’s being used for short reach and long reach in data centers, and we’re seeing a need for photonics at the modular level. We are working on how to bring it onto a board. There is, finally, so to speak, a light at the end of the tunnel.”

At this point no one knows how far this technology will go, or the timing of when it will begin to show up in packages or on chips. “Bringing it into the chip is everybody’s dream,” said Ramakrishna. “To make that happen, architectural solutions and technologies need to come into place. Right now, those building blocks are in progress. To grow it to scale requires the supply chain, the ecosystem, and it takes time.”

Money talks
The ecosystem appears to be firmly on board, though. “Silicon photonics will be a $33 billion to $35 billion industry,” said Sanjay Jha, CEO of GlobalFoundries, during a recent speech. “There will be a dramatic increase. It will be used for all the data in cars and connectivity between racks of servers. There will be a seamless distribution of processing in the data center.”

Funding is increasing, as well. In 2014, the U.S. government created the Integrated Photonics Manufacturing Institute, spearheaded by the U.S. Department of Defense, with more than $200 million in available funds. So far, three states have jumped in with their own funding—New York, California and Massachusetts, and there is growing support from private industry. The current funding, according to industry insiders, is now up to just over $600 million.

The goal of all of these efforts is to eke efficiencies and economies of scale out of silicon photonics, as the semiconductor industry did with digital logic and memory using as a guide. Silicon photonics is viewed as a way of moving more data more efficiently, and even more securely, but the price has to drop significantly for it to reach a broader audience.

For processors to utilize photonics, optical signals need to be converted to electrical signals. Research is underway to process and store optical signals, sidestepping that entire conversion process, but most experts believe it will be years before a solution is ready, and even then it’s questionable whether it will be cost-effective.

At this point, the three leaders in this field are Cisco, Intel and IBM. Of the three, only Cisco is shipping the technology in quantity in a variety of devices.

To really hit the mainstream, price-sensitive chip market, two key problems have to be solved. First, there needs to be a better way to attach a laser, which is the light source for photonics, to a silicon platform.

“One challenge is that lasers built today are using III-V materials, which are inherently not compatible with CMOS,” said Kaushik Patel, director of engineering for silicon photonics development at Cisco. “There is work underway with quantum dots to grow a laser, but right now lasers are discrete parts.”

The second challenge deals with how to extend the life of those lasers. “Today’s lasers have limited life,” said Patel. “So we need a way to efficiently couple photons, and we need an efficient way to couple them outside of the silicon.”

Fig. 1: Projections about cost of photonics. Source: Cisco.

Optical to electrical, and back again
Converting signals takes energy and time. The electro-optical conversion process requires modulation of an RF signal onto the output of a laser diode, and then a receiver to convert the signal back to electrical.

Inside of data centers, the signal can be carried by an optical fiber cable. The same idea works for a 2.5D package, where one die is electrical and the other is optical. So far, an entire system that incorporates electrical and optical has not been commercially available on a single die, and it doesn’t appear likely anytime soon. There is even debate about whether a 2.5D chip using optics and standard electronics will outperform one built with existing CMOS.

“Right now it doesn’t make sense on a die,” said Drew Wingard, CTO of Sonics. “It probably will not beat the performance of electrical connections in a package. You have to go a reasonable distance for the delay in conversion to make sense. And with the interconnect density of interposers, you basically can throw wires at the problem. You have lots of wires running in parallel.”

Wingard said that until those problems are solved, the usefulness of photonics will remain limited in an SoC.

There are several basic components involved in silicon photonics. One is a waveguide, which is the equivalent of a switch in the electrical world. The second is a splitter, also known as a multiplexer (mux) or demultiplexer (demux). The third is a coupling mechanism, to get the photons off a chip.

There are various knobs to turn in all of this, as well. For example, wavelength division multiplexing creates different wavelengths that can co-exist or be routed through a device. And some of this can be manipulated further because the refractive index of light changes in response to an electric field, which is known as the Kerr effect.

What’s particularly attractive is that it all can be built using existing manufacturing technology on a silicon-on-insulator or even a bulk CMOS substrate. Mentor Graphics has built an entire photonics flow, including a PDK, verification, and lithography simulation, just as it would for a standard chip. So far, business has been slow.

“There are a lot of people doing R&D, including startups with innovative structures for sensors,” said Chris Cone, product marketing manager for the Pyxis IC Station at Mentor. “For the broad market, people are staying on the sidelines, but because of the high-speed data throughput and I/O, they’re keeping a pulse on photonics.”

There is more interest these days on all sides, though. Photonics solve some very basic problems in chip design. ”The nice thing about photonics is that photons do not interact,” said Cone. “If you put two electrons together, they repel each other. With photons, you can piggyback multiple signals into fiber. It’s a new way to multiplex signals.”

That’s particularly interesting at advanced nodes, because thinner gate oxides and shorter channel widths provide less insulation and distance between signals. On top of that, there is more congestion to interrupt the flow, increased effects from dynamic power density, and more current leakage. All of that impacts electrical signals, but it has almost no impact on the optical side.

Building photonics into chips
At the chip level, the first implementations will be die-to-die within a package using an interposer, most likely using one chip for photonics and another for standard electronic processing and routing. The opto-electric conversion will happen either before it crosses into a standard silicon interposer, or after the signals reach the other side using an optical interposer.

“Silicon photonics is certainly very interesting to fabless companies because it’s an extension of what they’re already doing,” said Gilles Lamant, distinguished engineer at Cadence. “But for fabs, unless they have an SOI process in place, they’re out of luck.”

He said that so far, automation is limited, as well. For instance, optical simulation is different than electrical simulation, and there is no standardized way to do it. While each of the major EDA companies has its own simulator, they are basically doing the same job. That kind of learning doesn’t exist yet on the photonics side.

“If we can add traditional electronic design methodologies to photonics, it will decrease the learning curve,” Lamant said. “We have made some progress. Today, optical (timing domain and frequency domain) can be simulated together with electrical from a single schematic. From that schematic, layout can be implemented and verified (schematic-driven layout).”

Layout is indeed one of the big changes, and where EDA companies are focusing their efforts. “Topologically, you need to connect everything together with wave guides,” said Mentor’s Cone. “You can have waveguide crossings, where you etch that in silicon or an epitaxial layer, but you have to anneal it to smooth sidewalls to allow the light to bounce through. One thing that’s different is that it’s possible to cross waveguides. That won’t cause a short because photons don’t interact the way electrons do.”

There are other unique considerations in silicon photonics, as well. One involves connectivity through the wave guide. Interferometers are commonly used in these kinds of devices to split beams, and each of those beams must then be reflected back toward the beam splitter, which then combines their amplitudes. That means five components within a circuit that most chip engineers normally don’t encounter.

Phase shifting of signals is another option, using ring modulators. By using a balanced PN junction and applying an electrical field, those signals can be modulated and controlled. And with interferometers, signals can be brought together in-phase or out of phase, which provides even more possibilities. On top of that, there is bias tuning. The result of all of this work is time-consuming at this point, but the results are intriguing. Signals can be speeded up well beyond what engineering teams can even imagine at this point.

Fig. 2: Light wave can add or subtract, based on the phase. Source: Cisco, based upon data from Wikipedia and Intel.

In fact, one of the key drivers behind an all-optical device is that whenever electronic components are involved, they invariably slow down on-chip and off-chip communication and computation. An all optical device would be virtually unlimited in terms of compute power, by today’s standards, because it requires very little power to drive signals, there is no measurable heat, and signals can move at speeds that are orders of magnitude faster than electrons through copper.

“Right now, this is all gated by the electrical side,” said Cisco’s Patel. “An optical IC at some point has to deal with an electrical signal and the rate at which you can switch electrical. What will happen from here is we will extend the boundary of optical. Optical processing at this point is expensive. It’s not a CMOS cost structure. But as the cost of structures comes down and key issues are resolved, that will change. The long march has started. We will move from electrical interposers to electro-optical interposers.”

Conclusion
Looked at another way, the real bottleneck in optical design isn’t in the electrical domain. Moore’s Law and a concerted effort by EDA vendors, equipment makers and foundries has squeezed every fraction of a penny out of that effort. That process is just beginning in optical, and it will take years to leverage the same kinds of economies of scale.

That doesn’t mean progress will not be significant on the optical side. The benefits are very real, particularly as Moore’s Law becomes more difficult to sustain. Wires are too thin, creating thermal issues that affect reliability, and multi-patterning is slow and expensive. But at least for the initial versions, photonics will be tied to standard chips using some sort of high-speed interconnect and data will continue to be stored in standard memory types, from DRAM to NAND and spinning media.

Where photonics will play a role is on the very high-speed transfer of data, moving over time closer to the actual processing and possibly into the processor and the storage. There is no road map for that sequence of events yet, but investments are increasing everywhere as interest in this approach continues to grow.

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