One-On-One: Dark Possibilities


Professor Michael Taylor’s research group at UC San Diego is studying ways to exploit dark silicon to optimize circuit designs for energy efficiency. He spoke with Semiconductor Engineering about the post-Dennard scaling regime, energy efficiency from integrated circuits all the way up to data centers, and how the manufacturing side can help. What follows are excerpts of that conversation. (P... » read more

Moore’s Law At 50


Moore's Law turned 50 this week…but not because of Gordon Moore. He observed that the number of transistors crammed onto a piece of silicon was doubling every 18 to 24 months and predicted that would continue to be the case. He was right, but it took many thousands of engineers who created methodologies and tools to automate the design and equipment to manufacture complex chips to make that o... » read more

What EDA’s Big 3 Think Now


In the past two months the CEOs of Cadence, Synopsys and Mentor Graphics delivered their annual high-level messages to their respective user groups. Semiconductor Engineering attended all of the speeches at these conferences, as it did in 2014 (see story here). From a high level, the big issues for CEOs last year were Moore's Law, the costs of design, the impact of low power, and business-... » read more

FinFET Rollout Slower Than Expected


The foundry business is heating up as some new and large players are entering the 16nm/14nm [getkc id="185" kc_name="finFET"] market. But foundry customers are taking longer than expected to migrate to finFETs amid some technical and cost issues. On the foundry front, [getentity id="22846" comment="Intel"] has been the sole player in finFETs for some time. But now, [getentity id="22865" ... » read more

Will Wearables Work Well Enough?


By Ed Sperling & Ann Steffora Mutschler The rollout of the Apple Watch later this month has reset expectations for the wearable electronics market, just as early implementations of the Pebble, Fitbit and Google Glass helped raise awareness about a new level of portability and connectivity. Early projections are for strong sales, which in turn will propel a new level of connectedness for the ... » read more

5 Reasons EUV Will Or Won’t Be Used


Digging into this subject, there are five metrics that count in a lithography tool: resolution, throughput, defects, overlay, and reliability. So what does the best data tell us about the current state and realistic prognosis for [gettech id="31045" comment="EUV"]. Semiconductor Engineering posed this question to Matt Colburn, senior manager for patterning research at [getentity id="22306" comm... » read more

Issues And Options At 5nm


While the foundries are ramping up their processes for the 16nm/14nm node, vendors are also busy developing technologies for 10nm and beyond. In fact, chipmakers are finalizing their 10nm process offerings, but they are still weighing the technology options for 7nm. And if that isn’t enough, IC makers are beginning to look at the options at 5nm and beyond. Today, chipmakers can see a p... » read more

Low Power Trends Toward FinFET


My previous blog, Power Reduction Techniques, covered which low power techniques were applicable for various process nodes, from larger planar CMOS process technologies through finFET. The 16 and 14nm finFET-based process nodes are moving into production this year, and we are seeing many companies rapidly move their designs to finFET. In my last post, I noted some of the reasons why finFET is s... » read more

FD-SOI Meets The IoT


Silicon-on-insulator manufacturing technology has been discussed for many years. IBM has used the partially depleted variation of SOI in its server products, but the fully depleted version has yet to find widespread adoption outside of mil/aero and automotive markets. That may change soon as applications in the Internet of Things ramp, given the requirements for ultra low power and low cost.... » read more

Semiconductors By The Numbers


Five economists presented their observations and predictions on a broad range of issues, from cycles to wafer fab materials to geopolitics and how they will affect semiconductor manufacturing at this month's SEMI's Industry Strategy Symposium. Comparing their different viewpoints would be to take them out of context, because their starting points are so different. To avoid confusion, Semicon... » read more

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