tag: 3D packaging

Probing Attacks Against Chiplets
By Technical Paper Link - 11 Jun, 2024 - Comments: 0

A technical paper titled “Evaluating Vulnerability of Chiplet-Based Systems to Contactless Probing Techniques” was published by researchers at University of Massachusetts and Worcester Polytechnic Institute. Abstract: "Driven by a need for ever increasing chip performance and inclusion of innovative features, a growing number of semiconductor companies are opting for all-inclusive System-... » read more

Making Chip Packaging More Reliable
By Mark LaPedus - 15 Apr, 2021 - Comments: 0

Packaging houses are readying the next wave of IC packages, but these products must prove to be reliable before they are incorporated into systems. These packages involve several advanced technologies, such as 2.5D/3D, chiplets and fan-out, but vendors also are working on new versions of more mature package types, like wirebond and leadframe technologies. As with previous products, packaging... » read more

System Electrothermal Transient Analysis of A High Current (40A) Synchronous Step Down Converter
By Cadence - 11 Dec, 2019 - Comments: 0

Authors: Rajen Murugan, Jie Chen, and Todd Harrison of Texas Instruments, Inc. and C.T. Kao and Nathan Ai of Cadence Design Systems; from Proceedings of the ASME 2019 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, IPACK2019, October 7-9, 2019, Anaheim, CA, USA In this paper, we detailed the system electrothermal transi... » read more

Wrestling With High-Speed SerDes
By Ann Mutschler - 19 Jun, 2019 - Comments: 2

SerDes has emerged as the primary solution in chips where there is a need for fast data movement and limited I/O, but this technology is becoming significantly more challenging to work with as speeds continue to rise to offset the massive increase in data. A Serializer/Deserializer is used to convert parallel data into serial data, allowing designers to speed up data communication without h... » read more

Lithography Challenges For Leading Edge 3D Packaging Applications
By Veeco - 18 Apr, 2019 - Comments: 0

Leading edge consumer electronic products drive demand for enhanced performance and small form factors. This in turn drives manufacturing requirements for all aspects of semiconductor device fabrication. As the cost of front end device manufacturing continues to escalate rapidly with each new technology node, semiconductor manufacturing companies are now also focusing on packaging technology to... » read more

Packaging Biz Faces Challenges in 2019
By Mark LaPedus - 10 Dec, 2018 - Comments: 0

The IC packaging industry is bracing for slower growth, if not uncertainty, in 2019, even though advanced packaging remains a bright spot in the market. Generally, IC packaging houses saw strong demand in the first part of 2018, but the market cooled in the second half of the year due to a slowdown in memory. Going forward, the slower IC packaging market is expected to extend into the first ... » read more

Keeping The Whole Package Cool
By Katherine Derbyshire - 12 May, 2016 - Comments: 0

Heat dissipation is a critical issue for designers of complex chip-stacking and system-in-package devices. The amount of heat generated by a device increases as the number of transistors goes up, but the ability to dissipate the heat depends on the package surface area. Because the goal of 3D packaging is to squeeze more transistors into less overall space, new heat dissipation issues are em... » read more

Trickle Down Equipment Economics
By Jeff Chappell - 16 May, 2013 - Comments: 0

By Jeff Chappell By now, with the rise of China as a center of manufacturing, everyone in the chip industry has no doubt heard of the supposed Chinese curse, "May you live in interesting times." It's practically cliché. The thing is, the next two industry cycles may indeed prove interesting for the used equipment market. At the moment, everyone is tired of interesting times, and those in ... » read more

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