tag: FPGA

Using PCIe Real World Interface For High-Speed Hybrid Prototyping
By Synopsys - 25 Nov, 2019 - Comments: 0

This white paper highlights a novel approach to hybrid prototyping using a PCIe interface between the HAPS FPGA-based prototyping and the Virtualizer virtual prototyping. The use of PCIe real world interface helps to deliver a prototyping system, running fast enough to enable embedded software development and hardware-software co-validation in the shortest possible time. The hybrid prototyping ... » read more

Week In Review: IoT, Security, Automotive
By Susan Rambo - 22 Nov, 2019 - Comments: 0

Automotive Porsche’s electric race car, the 99X Electric, used ANSYS Technology’s system-level simulation solutions to create an advanced electric powertrain. The powertrain is also being adapted for use in Porsche’s consumer electric cars. "ANSYS system-level simulations are instrumental for optimizing the Porsche E-Performance Powertrain's motor, gearbox, power electronics and control ... » read more

Using SLX FPGA For Performance Optimization Of SHA-3 For HLS
By Silexica - 23 Oct, 2019 - Comments: 0

Author: Zubair Wadood SLX FPGA facilitates converting your C/C++ project into an FPGA bitstream easier and with higher performance. Leveraging standard HLS (High Level Synthesis) tools from FPGA vendors, SLX FPGA tackles the challenges associated with the HLS design flow. In this paper, the results of an SLX FPGA-optimized implementation of a Secure Hash Algorithm (SHA-3; also known as Kecca... » read more

Week In Review: Design, Low Power
By Jesse Allen - 04 Oct, 2019 - Comments: 0

Synopsys completed its acquisition of QTronic GmbH, a provider of simulation, test tools, and services for automotive software and systems development. Terms of the deal were not disclosed. Synopsys launched the PrimeECO design closure solution, a signoff-driven solution that the company says achieves signoff closure with zero iterations. The tool includes a machine-learning-driven Hybrid Ti... » read more

Where Is The Edge?
By Ed Sperling - 02 Oct, 2019 - Comments: 0

Mike Fitton, senior director of strategic planning at Achronix, talks about what the edge will look like, how that fits in with the cloud, what the requirements are both for processing and for storage, and how this concept will evolve.   Edge Knowledge Center Top stories, videos, blogs, white papers all related to the Edge » read more

Why Data Is So Difficult To Protect In AI Chips
By Ed Sperling - 25 Sep, 2019 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss a wide range of hardware security issues and possible solutions with Norman Chang, chief technologist for the Semiconductor Business Unit at ANSYS; Helena Handschuh, fellow at Rambus, and Mike Borza, principal security technologist at Synopsys. What follows are excerpts of that conversation. The first part of this discussion ca... » read more

The Race To Next-Gen 2.5D/3D Packages
By Mark LaPedus - 23 Sep, 2019 - Comments: 4

Several companies are racing each other to develop a new class of 2.5D and 3D packages based on various next-generation interconnect technologies. Intel, TSMC and others are exploring or developing future packages based on one emerging interconnect scheme, called copper-to-copper hybrid bonding. This technology provides a way to stack advanced dies using copper connections at the chip level,... » read more

FPGA Design Tradeoffs Getting Tougher
By Ann Mutschler - 16 Sep, 2019 - Comments: 0

FPGAs are getting larger, more complex, and significantly harder to verify and debug. In the past, FPGAs were considered a relatively quick and simple way to get to market before committing to the cost and time of developing an ASIC. But today, both FPGAs and eFPGAs are being used in the most demanding applications, including cloud computing, AI, machine learning, and deep learning. In some ... » read more

Synopsys FPGA Platform: Enabling Faster Design, Verification and Debug of FPGAs
By Synopsys - 11 Sep, 2019 - Comments: 0

Field programmable gate arrays (FPGAs) are no longer the co-processor of full-custom chips and application-specific integrated circuits (ASICs). Today's FPGA offerings include devices as large and complex as any ASIC system-on-chip (SoC) on the market. The dramatic increase in size, complexity and functionality means that many FPGA development teams are adopting ASIC-style design, verification ... » read more

IP Security In FPGAs
By Ed Sperling - 05 Sep, 2019 - Comments: 0

Quinn Jacobson, strategic architect at Achronix, talks about security in FPGAs, including how to prevent reverse engineering of IP, how to make sure the design is authentic, and how to limit access to IP in transit and in the chip. » read more

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